Stacked type semiconductor memory device with varying widths in the insulating member and pillars
According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.
1. A semiconductor memory device comprising:
a stacked body including a plurality of insulating films and a plurality of first electrode films alternately stacked in a first direction;
an insulating member extending through the stacked body in the first direction and extending in the stacked body in a second direction crossing the first direction, and separating the stacked body in a third direction crossing the first direction and the second direction;
a first pillar including a semiconductor, and extending through the stacked body in the first direction;
a bit line extending in the third direction below the stacked body and electrically connected to a lower end of the first pillar; and
a source line extending in the third direction above the bit line and electrically connected to an upper end of the first pillar, wherein the insulating member includes a lower portion, an upper portion, and a middle portion between the lower portion and the upper portion,
the lower portion has a first width in the third direction,
the upper portion has a second width in the third direction,
the middle portion has a third width in the third direction,
the third width is greater than the first width and the second width, and
the first width is greater than the second width.
2. The semiconductor memory device according to claim 1 , wherein the upper end of the first pillar is located above the upper portion of the insulating member.
3. The semiconductor memory device according to claim 1 , further comprising:
a metal film above the stacked body; and
an insulating film below the stacked body, wherein
the metal film contacts the upper portion of the insulating member, and
the insulating film contacts the lower portion of the insulating member.
4. The semiconductor memory device according to claim 1 , wherein
the third width is a maximum width of the insulating member in the third direction,
the middle portion is located below a first portion of the first pillar, and
the first portion has a maximum width of the first pillar in the third direction.
5. The semiconductor memory device according to claim 1 , wherein
the third width is a maximum width of the insulating member in the third direction,
the middle portion is located below a second portion of the first pillar, and
the second portion has a minimum width of the first pillar in the third direction.
6. The semiconductor memory device according to claim 1 , further comprising a joint portion connecting to the first pillar, wherein
the joint portion extends in the third direction above the upper portion of the insulating member.