Server farm with at least one hybrid computing module operating at clock speed optimally matching intrinsic clock speed of a related semiconductor die related thereto
View Patent ↗A server farm with at least one hybrid computing module operating at clock speed optimally matching intrinsic clock speed of a related semiconductor die related thereto.
1. A server farm comprising:
a plurality of servers, a power management system that delivers electrical power to the server farm and requires three or fewer high efficiency stages between a power and/or primary power source and any intrinsic AC or DC power bus in the server farm that consumes electric power,
each one of the plurality of servers comprising:
a semiconductor die embedded in a high-speed semiconductor chip stack or a semiconductor carrier,
at least one hybrid computing module operating at a system clock speed that optimally matches an intrinsic clock speed of the semiconductor die embedded within the high-speed semiconductor chip stack or mounted upon the semiconductor carrier; and
one or more high-speed semiconductor chip stacks bonded to a surface of semiconductor carrier in which at least one passive component element maintains critical performance tolerances and has a polarization response time determined solely by orbital deformations and operates in phase, thus does not distort, any of an applied signal components forming a high-speed digital pulse operating at clock speeds that run into a terahertz (THz) frequency domain;
wherein the servers of the server farm are mounted within a plurality of slots in a server rack, further comprising a first harness that forms a communications bus interface, preferably an optical interface, with other servers mounted within the server rack; and
wherein the server racks are assembled to form a server tower comprising a plurality of server racks and a second harness that forms a communications bus interface, preferably an optical interface, with other servers mounted within the server tower.
2. The server farm of claim 1 , wherein a plurality of towers are used to form at least one row of server towers or a plurality of rows of server towers and a third harness that forms a communications bus interface, preferably an optical interface, with other server towers distributed within a row of server towers or between rows of server towers.
3. The server farm of claim 1 comprising a server, wherein the server or servers comprise:
the hybrid computing module within the server or plurality of servers comprises a power management device that further comprises a resonant gate transistor;
wherein the hybrid computing module configured for Minimal Instruction Set Computing by means of a chip that comprises a FORTH engine mounted on the semiconductor carrier or embedded within the high-speed semiconductor chip stack; and
wherein the servers are mounted within a plurality of slots in the server rack, further comprising the first harness that forms a communications bus interface, preferably an optical interface, with other servers mounted within the server rack.
4. The server farm of claim 3 , wherein the server racks are assembled to form the server tower comprising the plurality of server racks and the second harness forms a communications bus interface, preferably an optical interface, with other servers mounted within the server tower.
5. The server farm of claim 1 , wherein the hybrid computing module configured for Minimal Instruction Set Computing by means of a chip that comprises a FORTH engine mounted on the semiconductor carrier or embedded within the high-speed semiconductor chip stack;
wherein the hybrid computing module configured for Minimal Instruction Set Computing utilizes a computing language other than FORTH, but the processor chip that enables the engine to adopt a Stack Machine Architecture has features similar to a FORTH engine including:
the ability to access multiple memory spaces simultaneously in a single microprocessor clock cycle; and,
that utilizes a minimal number of instruction sets through the use of separate buses to access memory holding a data stack, a return stack, and a program memory, among other useful program utilities.
6. The server farm of claim 5 , wherein, the hybrid computing module within the server or plurality of servers comprises a power management device that further comprises a resonant gate transistor;
wherein the hybrid computing module configured for Minimal Instruction Set Computing by means of a chip that comprises FORTH engine mounted on the semiconductor carrier or embedded within the high-speed semiconductor chip stack; and
wherein the server farm has no need for cache memory or predictive algorithms.
7. The server farm of claim 6 that processes a function using the most efficient algorithm type (iterative, recursive, or deeply nested loop) for that specific function.
8. The server farm of claim 5 wherein the hybrid computing module does not comprise a predictive algorithm to manage the sequence of data or instructions sets flowing into a processor chip.
9. The server farm of claim 5 , wherein the servers are mounted within the plurality of slots in the server rack, further comprising the first harness that forms a communications bus interface, preferably an optical interface, with other servers mounted within the server rack.
10. The server farm of claim 9 , wherein the server racks are assembled to form the server tower comprising the plurality of server racks and the second harness forms a communications bus interface, preferably an optical interface, with other servers mounted within the server tower.
11. The server farm of claim 1 , wherein the server does not comprise a printed circuit board.