IP Library › Granted Patent US 12,353,008
Granted Patent B2
US 12,353,008 · App. 18/354,662 · Granted Jul 8, 2025

Package, optical device, and manufacturing method of package

Inventors: Hsien-Wei Chen (Hsinchu, TW); Ming-Fa Chen (Taichung, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
G02B6/1225G02B6/4239G02B6/4283G02B2006/1213
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,353,008
App. No.
18/354,662
Granted
Jul 8, 2025
Kind
B2
Abstract

A package includes a photonic integrated circuit die and an electric integrated circuit die. The photonic integrated circuit die includes a substrate and a waveguide. The substrate has a notch and the notch is occupied by air. The waveguide is disposed over the substrate. In a top view, a first portion of the waveguide is overlapped with the substrate and a second portion of the waveguide is overlapped with the notch. The electric integrated circuit die is disposed over the photonic integrated circuit die.

Claims (40)

1. A package, comprising:

a photonic integrated circuit die, comprising:

a substrate having a notch, wherein the notch is occupied by air, and the notch extends from an interior of the substrate to an end edge of the substrate; and

a waveguide disposed over the substrate and outside of the notch, wherein in a top view, a first portion of the waveguide is overlapped with the substrate and a second portion of the waveguide is overlapped with the notch; and

an electric integrated circuit die disposed over the photonic integrated circuit die.

2. The package of claim 1 , further comprising a supporting substrate over the electric integrated circuit die.

3. The package of claim 1 , wherein the photonic integrated circuit die further comprises an etch stop layer located between the substrate and the waveguide.

4. The package of claim 1 , wherein a height of the notch is equal to a thickness of the substrate.

5. The package of claim 1 , wherein a height of the notch is smaller than a thickness of the substrate.

6. The package of claim 1 , wherein the photonic integrated circuit die further comprises through vias penetrating through the substrate, and the through vias are electrically connected to the electric integrated circuit die.

7. The package of claim 1 , wherein a width of the first portion of the waveguide is constant, and a width of the second portion of the waveguide varies.

8. An optical device, comprising:

a circuit substrate; and

a package disposed on the circuit substrate, wherein the package comprises:

a photonic integrated circuit die, comprising:

a substrate comprising a notch, wherein the notch is occupied by air, and the notch extends from an interior of the substrate to an end edge of the substrate; and

a waveguide disposed over the substrate, wherein the waveguide is partially overlapped with a span of the substrate and is partially overlapped with a span of the notch.

9. The optical device of claim 8 , wherein the package further comprises:

an electric integrated circuit die disposed over the photonic integrated circuit die;

an encapsulant laterally encapsulating the electric integrated circuit die; and

a redistribution structure dispose over the photonic integrated circuit die opposite to the electric integrated circuit die.

10. The optical device of claim 8 , further comprising:

an optical fiber disposed adjacent to the waveguide, wherein the optical fiber is optically coupled to the waveguide; and

a supporting structure disposed on the circuit substrate, wherein the optical fiber is disposed on the supporting structure.

11. The optical device of claim 8 , wherein a width of the notch gradually increases from the end edge of the substrate toward the interior of the substrate.

12. The optical device of claim 8 , wherein a width of the notch gradually decreases from the end edge of the substrate toward the interior of the substrate.

13. The optical device of claim 8 , wherein a width of the notch is uniform.

14. The optical device of claim 8 , wherein the photonic integrated circuit die further comprises an etch stop layer located between the substrate and the waveguide.

15. The optical device of claim 8 , wherein a height of the notch is equal to a thickness of the substrate.

16. The optical device of claim 8 , wherein a height of the notch is smaller than a thickness of the substrate.

17. A manufacturing method of a package, comprising:

providing a substrate having a first surface and a second surface opposite to the first surface;

forming waveguides over the first surface of the substrate;

placing an electric integrated circuit die over the waveguides;

forming a redistribution structure on the second surface of the substrate;

removing a portion of the substrate to form notches in the substrate such that the notches are completely occupied by air; and

performing a singulation process to form the package such that the notch extends from an interior of the substrate to an end edge of the substrate.

18. The method of claim 17 , wherein prior to the removal of the portion of the substrate, a portion of the redistribution structure is removed.

19. The method of claim 17 , further comprising forming conductive pads over the redistribution structure prior to the removal of the portion of the substrate.

20. The method of claim 17 , further comprising forming conductive pads over the redistribution structure after the removal of the portion of the substrate.

Continuity (4)
Continuation 17751666 · May 24, 2022
Continuation 17076795 · Oct 21, 2020
Provisional Application 62968161 · Jan 31, 2020
Related Publication 20230358956A1 · Nov 9, 2023
References Cited (12)
US 5621837A · Yamada · 1997 [cited by examiner]
US 6301401B1 · La · 2001 [cited by examiner]
US 6574379B2 · Miyazaki · 2003 [cited by examiner]
US 10180547B2 · Lee · 2019 [cited by examiner]
US 10948668B2 · Huang · 2021 [cited by examiner]
US 20070280585A1 · Warashina · 2007 [cited by examiner]
US 20080018477A1 · Forster · 2008 [cited by examiner]
US 20180003899A1 · Doerr · 2018 [cited by examiner]
US 20180122785A1 · Fiorentino · 2018 [cited by examiner]
CN 103754817A · 2014 [cited by examiner]
EP 0366974A1 · 1990 [cited by examiner]
CN-103754817-A English translation (Year: 2014). [cited by examiner]