IP Library Granted Patent US 12,354,908
Granted Patent B2
US 12,354,908 · App. 18/609,908 · Granted Jul 8, 2025

Amorphous layers for reducing copper diffusion and method forming same

Inventors: Jyh-Nan Lin (Hsinchu, TW); Chia-Yu Wu (Hsinchu, TW); Kai-Shiung Hsu (Hsinchu, TW); Ding-I Liu (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/76829C23F1/12H01L21/02178H01L21/76802H01L23/5226H01L23/53209H01L23/53295
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Quick Facts
Patent No.
US 12,354,908
App. No.
18/609,908
Granted
Jul 8, 2025
Kind
B2
Abstract

A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.

Claims (49)

1. An integrated circuit structure comprising:

a dielectric layer;

a first conductive feature in the dielectric layer;

a metal cap over and contacting the first conductive feature, wherein the metal cap is amorphous, and wherein at least a lower part of the metal cap is lower than a top surface of the dielectric layer;

a first etch stop layer over the metal cap, wherein the first etch stop layer has a first amorphous structure;

a second etch stop layer over the first etch stop layer, wherein the second etch stop layer has a second amorphous structure or a polycrystalline structure, and the second etch stop layer comprises a material different from a material of the first etch stop layer;

a low-k dielectric layer over the second etch stop layer; and

a second conductive feature in the low-k dielectric layer, the first etch stop layer, and the second etch stop layer.

2. The integrated circuit structure of claim 1 , wherein the metal cap comprises a metal nitride.

3. The integrated circuit structure of claim 2 , wherein the metal nitride comprises a cobalt nitride.

4. The integrated circuit structure of claim 1 , wherein the first etch stop layer comprises an amorphous aluminum nitride layer.

5. The integrated circuit structure of claim 4 , wherein the amorphous aluminum nitride layer comprises hydrogen therein.

6. The integrated circuit structure of claim 1 , wherein the second etch stop layer is amorphous.

7. The integrated circuit structure of claim 1 , wherein the second etch stop layer is polycrystalline.

8. The integrated circuit structure of claim 1 further comprising:

a third etch stop layer over the second etch stop layer, wherein the third etch stop layer is amorphous.

9. The integrated circuit structure of claim 1 further comprising:

a third etch stop layer over the second etch stop layer, wherein the third etch stop layer is polycrystalline.

10. An integrated circuit structure comprising:

a first dielectric layer;

a first conductive feature in the first dielectric layer, wherein the first conductive feature comprises:

a diffusion barrier; and

a copper region in the diffusion barrier;

a cobalt nitride cap over and contacting the copper region;

an etch stop layer comprising:

a first sub layer over and contacting the cobalt nitride cap and the first dielectric layer;

a second sub layer over the first sub layer; and

a third sub layer over the second sub layer, wherein at least one of the first sub layer, the second sub layer, and the third sub layer has an amorphous structure;

a second dielectric layer over the etch stop layer; and

a conductive via in the second dielectric layer and the etch stop layer.

11. The integrated circuit structure of claim 10 , wherein the cobalt nitride cap is amorphous.

12. The integrated circuit structure of claim 10 , wherein the cobalt nitride cap has a thickness in a range between about 20 Å and about 40 Å.

13. The integrated circuit structure of claim 10 , wherein the first sub layer has the amorphous structure, and the second sub layer has a polycrystalline structure.

14. The integrated circuit structure of claim 13 , wherein the third sub layer has an additional amorphous structure.

15. The integrated circuit structure of claim 10 , wherein the first sub layer has the amorphous structure, and the third sub layer has a polycrystalline structure.

16. The integrated circuit structure of claim 15 , wherein the second sub layer has an additional amorphous structure.

17. The integrated circuit structure of claim 10 , wherein the first sub layer comprises aluminum nitride, and the second sub layer comprises silicon oxycarbide.

18. An integrated circuit structure comprising:

a first dielectric layer;

a copper feature in the first dielectric layer;

a cobalt nitride cap over and contacting the copper feature, wherein the cobalt nitride cap has an amorphous structure;

an etch stop layer comprising:

an aluminum nitride layer over the cobalt nitride cap and the first dielectric layer, wherein the aluminum nitride layer has an amorphous structure;

a silicon oxycarbide layer over the aluminum nitride layer; and

an aluminum oxide layer over the silicon oxycarbide layer, wherein the silicon oxycarbide layer and the aluminum oxide layer have a polycrystalline structure or an amorphous structure;

a low-k dielectric layer over the etch stop layer; and

a second conductive feature in the low-k dielectric layer and the etch stop layer.

19. The integrated circuit structure of claim 18 , wherein the silicon oxycarbide layer is polycrystalline.

20. The integrated circuit structure of claim 18 , wherein the aluminum oxide layer is polycrystalline.

Continuity (4)
Continuation 17660508 · Apr 25, 2022
Continuation 16890413 · Jun 2, 2020
Provisional Application 62891688 · Aug 26, 2019
Related Publication 20240258160A1 · Aug 1, 2024
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