Composite interposer structure and method of providing same
Techniques and mechanisms for high interconnect density communication with an interposer. In some embodiments, an interposer comprises a substrate and portions disposed thereon, wherein respective inorganic dielectrics of said portions adjoin each other at a material interface, which extends to each of the substrate and a first side of the interposer. A first hardware interface of the interposer spans the material interface at the first side, wherein a first one of said portions comprises first interconnects which couple the first hardware interface to a second hardware interface at the first side. A second one of said portions includes second interconnects which couple one of first hardware interface or the second hardware interface to a third hardware interface at another side of the interposer. In another embodiment, a metallization pitch feature of the first hardware interface is smaller than a corresponding metallization pitch feature of the second hardware interface.
1. An interposer comprising:
a first substrate comprising a glass;
a first insulator structure and first interconnect structures therein;
a second substrate comprising a semiconductor material;
a device layer between the second substrate and the first insulator structure;
through-substrate interconnect (TSI) structures which extend through the second substrate; and
a second insulator structure and second interconnect structures therein, wherein respective inorganic dielectrics of the first insulator structure and the second insulator structure adjoin each other at a material interface;
wherein first contacts, to couple the interposer to a first integrated circuit (IC) chip, are in an arrangement which spans the material interface at a first side of the interposer;
wherein second contacts, to couple the interposer to a second IC chip, comprise one or more contacts at a first surface of the first insulator structure;
wherein one or more of third contacts, at a second side of the interposer opposite the first side, are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts and the second contacts;
wherein others of the third contacts are electrically coupled to the device layer via one of the first interconnect structures or the TSI structures; and
wherein one or more of the first contacts and one or more of the second contacts are each electrically coupled to the device layer via the other of the first interconnect structures or the TSI structures.
2. The interposer of claim 1 , wherein:
the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the third contacts; and
one or more of the first interconnect structures are each electrically coupled between a respective one of the first contacts and a respective one of the second contacts.
3. The interposer of claim 1 , wherein:
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the first contacts; and
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the second contacts.
4. The interposer of claim 1 , wherein:
the one or more of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts; and
one or more others of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the second contacts.
5. The interposer of claim 4 , wherein one or more devices of the device layer are electrically coupled to the first contacts via the first interconnect structures.
6. The interposer of claim 1 , wherein the device layer adjoins the second insulator structure at the material interface.
7. The interposer of claim 1 , wherein one of the first interconnect structures extends both to one of the first contacts and to one of the second contacts.
8. A method comprising:
coupling a chiplet to a first substrate which comprises a glass, the chiplet comprising:
a first insulator structure and first interconnect structures therein;
a second substrate comprising a semiconductor material;
a device layer between the second substrate and the first insulator structure; and
through-substrate interconnect (TSI) structures which extend through the second substrate;
forming on the first substrate a second insulator structure and second interconnect structures therein, wherein respective inorganic dielectrics of the first insulator structure and the second insulator structure adjoin each other at a material interface;
coupling a first IC chip to first contacts of an interposer which comprises the first substrate, the chiplet, the second insulator structure, and the second interconnect structures, wherein the first contacts are in an arrangement which spans the material interface at a first side of the interposer; and
coupling a second IC chip to second contacts of the interposer, wherein the second contacts comprise one or more contacts at a first surface of the first insulator structure;
wherein one or more of third contacts, at a second side of the interposer opposite the first side, are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts and the second contacts;
wherein others of the third contacts are electrically coupled to the device layer via one of the first interconnect structures or the TSI structures; and
wherein one or more of the first contacts and one or more of the second contacts are each electrically coupled to the device layer via the other of the first interconnect structures or the TSI structures.
9. The method of claim 8 , wherein:
the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the third contacts; and
one or more of the first interconnect structures are each electrically coupled between a respective one of the first contacts and a respective one of the second contacts.
10. The method of claim 8 , wherein:
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the first contacts; and
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the second contacts.
11. The method of claim 8 , wherein:
the one or more of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts; and
one or more others of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the second contacts.
12. The method of claim 11 , wherein one or more devices of the device layer are electrically coupled to the first contacts via the first interconnect structures.
13. The method of claim 8 , wherein the device layer adjoins the second insulator structure at the material interface.
14. The method of claim 8 , wherein one of the first interconnect structures extends both to one of the first contacts and to one of the second contacts.
15. A system comprising:
an interposer comprising:
a first substrate comprising a glass;
a first insulator structure and first interconnect structures therein;
a second substrate comprising a semiconductor material;
a device layer between the second substrate and the first insulator structure;
through-substrate interconnect (TSI) structures which extend through the second substrate; and
a second insulator structure and second interconnect structures therein, wherein respective inorganic dielectrics of the first insulator structure and the second insulator structure adjoin each other at a material interface;
a first integrated circuit (IC) chip coupled to the interposer via first contacts which are in an arrangement which spans the material interface at a first side of the interposer;
a second IC chip coupled to the interposer via second contacts, wherein one or more of the second contacts are at a first surface of the first insulator structure; and
a circuit board coupled to the interposer via third contacts at a second side of the interposer opposite the first side, wherein one or more of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts and the second contacts;
wherein others of the third contacts are electrically coupled to the device layer via one of the first interconnect structures or the TSI structures; and
wherein one or more of the first contacts and the one or more of the second contacts are each electrically coupled to the device layer via the other of the first interconnect structures or the TSI structures.
16. The system of claim 15 , wherein:
the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the third contacts; and
one or more of the first interconnect structures are each electrically coupled between a respective one of the first contacts and a respective one of the second contacts.
17. The system of claim 15 , wherein:
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the first contacts; and
one or more of the TSI structures are each electrically coupled between a respective device of the device layer, and a respective contact of the second contacts.
18. The system of claim 15 , wherein:
the one or more of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the first contacts; and
one or more others of the third contacts are each electrically coupled, via a respective one of the second interconnect structures, to a respective contact of the second contacts.
19. The system of claim 15 , wherein the device layer adjoins the second insulator structure at the material interface.
20. The system of claim 15 , wherein one of the first interconnect structures extends both to one of the first contacts and to one of the second contacts.