IP Library › Granted Patent US 12,396,150
Granted Patent B2
US 12,396,150 · App. 17/858,150 · Granted Aug 19, 2025

Pattern formation method and semiconductor device fabrication method using the same

Inventors: Dohee Kim (Seoul, KR); Sunguk Jang (Hwaseong-si, KR); Sahwan Hong (Suwon-si, KR); Kongsoo Lee (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H10B12/05H10B12/482H10B12/488
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Quick Facts
Patent No.
US 12,396,150
App. No.
17/858,150
Granted
Aug 19, 2025
Kind
B2
Abstract

A pattern formation method includes forming a first capping layer on a substrate, forming a recess that penetrates the first capping layer and an upper portion of the substrate, such that a non-penetrated portion of the first capping layer constitutes a first capping pattern, forming a second capping pattern that covers an inner sidewall of the recess, and forming a stack structure in the recess, such that the stack structure includes first stack patterns and second stack patterns that are alternately stacked, and the second capping pattern is between the substrate and a lateral surface of the stack structure.

Claims (47)

1. A pattern formation method, comprising:

forming a first capping layer on a substrate;

forming a recess that penetrates the first capping layer and an upper portion of the substrate, such that a non-penetrated portion of the first capping layer becomes a first capping pattern;

forming a second capping pattern that covers an inner sidewall of the recess;

forming a stack structure in the recess, such that the stack structure includes first stack patterns and second stack patterns that are alternately stacked, and the second capping pattern is between the substrate and a lateral surface of the stack structure; and

after forming the stack structure, removing the first capping pattern, the second capping pattern, and a portion of the substrate to form a protrusion of the substrate below the stack structure and the second capping pattern.

2. The pattern formation method as claimed in claim 1 , wherein a width at an upper portion of the protrusion is greater than a width at a lower portion of the stack structure.

3. The pattern formation method as claimed in claim 1 , wherein a combined profile of the lateral surface of the stack structure, a portion of a top surface of the protrusion, and a lateral surface of the protrusion has a stair-shape cross section, the portion of the top surface of the protrusion being exposed by the stack structure.

4. The pattern formation method as claimed in claim 1 , wherein forming the stack structure includes using a surface of the substrate as a seed to alternately epitaxially growing the first stack patterns and the second stack patterns, the surface of the substrate being exposed on a bottom surface of the recess.

5. The pattern formation method as claimed in claim 1 , wherein at least one of the first stack patterns and the second stack patterns includes silicon.

6. The pattern formation method as claimed in claim 1 , wherein at least one of the first stack patterns and the second stack patterns includes silicon and germanium.

7. The pattern formation method as claimed in claim 1 , wherein forming the second capping pattern includes:

forming a second capping layer that covers the inner sidewall and a bottom surface of the recess and extends onto a top surface of the first capping pattern; and

removing the second capping layer from the top surface of the first capping pattern and from the bottom surface of the recess, such that a portion of the second capping layer on the inner sidewall of the recess becomes the second capping pattern.

8. The pattern formation method as claimed in claim 1 , wherein the first capping pattern includes silicon oxide.

9. The pattern formation method as claimed in claim 1 , wherein the second capping pattern includes silicon nitride.

10. A semiconductor device fabrication method, comprising:

forming a first capping layer on a substrate;

forming a recess that penetrates the first capping layer and an upper portion of the substrate, such that a non-penetrated portion of the first capping layer becomes a first capping pattern;

forming a second capping pattern that covers an inner sidewall of the recess;

forming a stack structure including first stack patterns and second stack patterns that are alternately stacked in the recess;

forming a protrusion of the substrate by removing the first capping pattern, the second capping pattern, and a part of the substrate;

removing the second stack patterns; forming a semiconductor pattern by removing a portion of each of the first stack patterns;

forming on the semiconductor pattern a word line that extends across the semiconductor pattern;

forming a bit line connected to a first end of the semiconductor pattern, the bit line intersecting the word line; and

forming a capacitor connected to a second end of the semiconductor pattern.

11. The semiconductor device fabrication method as claimed in claim 10 , wherein a width at an upper portion of the protrusion is greater than a width at a lower portion of the stack structure.

12. The semiconductor device fabrication method as claimed in claim 10 , wherein a combined profile of a lateral surface of the stack structure, a portion of a top surface of the protrusion, and a lateral surface of the protrusion has a stair-shape cross section, the portion of the top surface of the protrusion being exposed by the stack structure.

13. The semiconductor device fabrication method as claimed in claim 10 , wherein the first capping pattern includes silicon oxide, and the second capping pattern includes silicon nitride.

14. The semiconductor device fabrication method as claimed in claim 10 , wherein forming the second capping pattern includes:

forming a second capping layer that covers the inner sidewall and a bottom surface of the recess and extends onto a top surface of the first capping pattern; and

removing the second capping layer from the top surface of the first capping pattern and from the bottom surface of the recess, such that a portion of the second capping layer on the inner sidewall of the recess becomes the second capping pattern.

15. A semiconductor device fabrication method, comprising:

forming a first capping layer on a substrate;

forming a recess that penetrates the first capping layer and an upper portion of the substrate, such that a non-penetrated portion of the first capping layer becomes a first capping pattern;

forming a second capping pattern that covers an inner sidewall of the recess;

forming a stack structure including first stack patterns and second stack patterns that are alternately stacked along a first direction perpendicular to a top surface of the substrate, the stack structure including a first part and a second part that are alternately provided along a second direction parallel to the top surface of the substrate;

forming a protrusion of the substrate by removing the first capping pattern, the second capping pattern, and a portion of the substrate;

removing the second part of the stack structure;

removing the second stack patterns of the first part of the stack structure; and

forming a gate structure in a region where the second stack patterns are removed.

16. The semiconductor device fabrication method as claimed in claim 15 , wherein a width at an upper portion of the protrusion is greater than a width at a lower portion of the stack structure.

17. The semiconductor device fabrication method as claimed in claim 15 , wherein a combined profile of a lateral surface of the stack structure, a portion of a top surface of the protrusion, and a lateral surface of the protrusion has a stair-shape cross section, the portion of the top surface of the protrusion being exposed by the stack structure.

18. The semiconductor device fabrication method as claimed in claim 15 , wherein the first capping pattern includes silicon oxide, and the second capping pattern includes silicon nitride.

19. The semiconductor device fabrication method as claimed in claim 15 , wherein forming the second capping pattern includes:

forming a second capping layer that covers the inner sidewall and a bottom surface of the recess and extends onto a top surface of the first capping pattern; and

removing the second capping layer from the top surface of the first capping pattern and from the bottom surface of the recess, such that the second capping layer on the inner sidewall of the recess becomes the second capping pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2022
From: KIM, DOHEE; JANG, SUNGUK; HONG, SAHWAN; LEE, KONGSOO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 060407/0114 →
Priority Claims (1)
KR 10-2021-0146700 · Oct 29, 2021 · national
Continuity (1)
Related Publication 20230137340A1 · May 4, 2023
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