Slow programming on weak word lines of a memory device
A slow programming audit is performed on one or more memory blocks and/or associated word lines of one or more memory dies. The slow programming audit is used to determine whether identified or known weak word lines of one or more memory dies are causing performance issues. If it is determined that the weak word lines are causing data read, data write and/or data retention issues, the weak word lines of the one or more memory dies are marked for slow programming in subsequent programming operations.
1. A method, comprising:
identifying one or more weak word lines of a memory die;
selecting one or more memory blocks associated with each of the one or more weak word lines;
determining a performance metric of each of the one or more weak word lines and the associated one or more memory blocks;
determining whether the performance metric of each of the one or more weak word lines and the associated one or more memory blocks exceeds a performance metric threshold;
based, at least in part, on determining the performance metric of each of the one or more weak word lines and the associated one or more memory blocks exceeds the performance metric threshold, identifying the one or more weak word lines of the memory die as a candidate for slow programming operations; and
causing subsequent programming operations performed on the one or more weak word lines of the memory die, and the memory blocks associated with the one or more weak word lines, to be programmed at a rate that is lower than a programming rate of programming operations performed on other word lines of the memory die.
2. The method of claim 1 , wherein the performance metric is determined after a predetermined number of programming operations have been performed on the memory die.
3. The method of claim 1 , wherein the performance metric is a failed bit count associated with the one or more weak word lines and the associated one or more memory blocks.
4. The method of claim 1 , further comprising monitoring a number of programming operations performed on the memory die based, at least in part, on determining that the performance metric of each of the one or more weak word lines and the associated one or more memory blocks is below the performance metric threshold.
5. The method of claim 4 , further comprising:
determining an additional performance metric of each of the one or more weak word lines and one or more additional memory blocks associated with the one or more weak word lines after a predetermined number of programming operations have been performed on the memory die;
determining whether the additional performance metric of each of the one or more weak word lines and the one or more additional memory blocks exceeds the performance metric threshold; and
based, at least in part, on determining the additional performance metric of each of the one or more weak word lines and the one or more additional memory blocks exceeds the performance metric threshold, identifying the memory die as a candidate for slow programming operations.
6. The method of claim 5 , wherein the one or more additional memory blocks include at least one of the selected memory blocks.
7. The method of claim 1 , wherein determining the performance metric of each of the one or more weak word lines and the associated one or more memory blocks comprises determining an average of the performance metric of each of the one or more weak word lines and the associated one or more memory blocks.
8. A data storage device, comprising:
one or more memory dies; and
a controller communicatively coupled to the one or more memory dies and operable to:
monitor programming operations performed on each memory die of the one or more memory dies; and
based, at least in part, on a determination that a number of programming operations performed on at least one memory die of the one or more memory dies exceeds a programming operation threshold:
identify at least one weak word line associated with the at least one memory die of the one or more memory dies;
select one or more memory blocks associated with the at least one weak word line;
determine a failed bit count of the at least one weak word line and the one or more memory blocks associated with the at least one weak word line;
determine whether the failed bit count exceeds a failed bit count threshold; and
based, at least in part, on a determination that the failed bit count exceeds the failed bit count threshold, identify the at least one weak word line of the memory die as a candidate for slow programming operations.
9. The data storage device of claim 8 , wherein the controller is further operable to continue monitoring the programming operations performed on the at least one memory die of the one or more memory dies based, at least in part, on a determination that the failed bit count is below the failed bit count threshold.
10. The data storage device of claim 9 , wherein the controller is further operable to:
determine an additional failed bit count of the at least one weak word line and one or more additional memory blocks associated with the at least one weak word line based, at least in part, on a determination that an additional number of programming operations performed on the at least one memory die of the one or more memory dies exceeds the programming operation threshold during the continued monitoring;
determine whether the additional failed bit count exceeds the failed bit count threshold; and
based on a determination that the additional failed bit count exceeds the failed bit count threshold, identify the at least one memory die as a candidate for slow programming operations.
11. The data storage device of claim 10 , wherein the one or more additional memory blocks include the selected one or more memory blocks.
12. The data storage device of claim 8 , wherein identifying the at least one memory die as a candidate for slow programming operations causes the controller to perform subsequent programming operations on the at least one weak word line of the at least one memory die, and the memory blocks associated with the at least one weak word line, to be programmed at a rate that is lower than a programming rate of programming operations performed on other word lines of the at least one memory die.
13. A non-volatile storage device, comprising:
one or more memory dies;
means for identifying one or more weak word lines associated with each of the one or more memory dies;
means for selecting one or more memory blocks associated with each of the one or more weak word lines;
means for determining a performance metric associated with each of the one or more weak word lines and the associated one or more memory blocks;
means for identifying the one or more weak word lines of the at least one memory die of the one or more memory dies as a candidate for slow programming operations based, at least in part, on a determination that the performance metric associated with each of the one or more weak word lines of the at least one memory die exceeds a performance metric threshold; and
means for performing programming operations on the one or more weak word lines of the at least one memory die, and the memory blocks associated with the one or more weak word lines, wherein the means for performing programming operations performs the programming operations on the one or more weak word lines of the at least one memory die at a rate that is lower than a programming rate of programming operations performed on other word lines of the at least one memory die.
14. The non-volatile storage device of claim 13 , further comprising means for monitoring a number of programming operations performed on each memory die of the one or more memory dies.
15. The non-volatile storage device of claim 14 , wherein determining the performance metric associated with each of the one or more weak word lines and the associated one or more memory blocks occurs based, at least in part, on the means for monitoring determining that the number of programming operations performed on at least one memory die of the one or more memory dies exceed a threshold.
16. The non-volatile storage device of claim 13 , further comprising means for monitoring programming operations performed on the at least one memory die of the one or more memory dies based, at least in part, on a determination that the performance metric associated with each of the one or more weak word lines and the associated one or more memory blocks of the at least one memory die is below the performance metric threshold.
17. The non-volatile storage device of claim 13 , wherein the performance metric is a failed bit count associated with the one or more weak word lines and the associated one or more memory blocks.
18. The non-volatile storage device of claim 13 , wherein the lower programming rate is associated with threshold voltage distribution that is more narrow when compared to a threshold voltage distribution of the programming rate of programming operations performed on other word lines of the at least one memory die.
19. The non-volatile storage device of claim 13 , wherein the performance metric is a number of program/erase (P/E) cycles associated with the non-volatile storage device.
20. The method of claim 1 , further comprising adjusting a frequency at which the performance metric of each of the one or more weak word lines and the associated one or more memory blocks is determined.