Semiconductor device package, electronic assembly and method for manufacturing the same
A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.
1. An electronic assembly, comprising:
a structure including a substrate, a protection layer disposed on the substrate, and a conductive layer disposed on the substrate; and
a semiconductor device package electrically connected to the conductive layer by a connection element, wherein the semiconductor device package has a short side and has a long side substantially perpendicular to the substrate in a cross-sectional perspective,
wherein the protection layer exposes a portion of the conductive layer, and the connection element covers the portion of the conductive layer, and
wherein the semiconductor device package comprises:
a carrier and an electronic component disposed on a lateral surface of the carrier; and
a conductive structure connected to the carrier and the connection element, wherein an elevation of the conductive structure is lower than an elevation of the electronic component with respect to the substrate.
2. The electronic assembly as claimed in claim 1 , wherein the connection element is connected to a lateral side surface of the semiconductor device package.
3. The electronic assembly as claimed in claim 1 , wherein at least a portion of the semiconductor device package is disposed over the protection layer.
4. The electronic assembly as claimed in claim 1 , wherein the substrate and the protection layer define a space, at least portion of the connection element disposed in the space.
5. The electronic assembly as claimed in claim 1 , further comprising a chip disposed over the substrate and electrically connected to the semiconductor device package.
6. An electronic assembly, comprising:
a structure including a substrate and a conductive layer disposed on the substrate; and
a semiconductor device package electrically connected to the conductive layer by a connection element, wherein the semiconductor device package has a short side and a long side substantially perpendicular to the substrate in a cross-sectional perspective,
wherein the connection element comprises a stepped portion defined by the conductive layer, and
wherein the structure further comprises a protection layer disposed over the substrate and exposing a portion of an upper surface of the substrate and a portion of the conductive layer.
7. The electronic assembly as claimed in claim 6 , wherein the semiconductor device package does not vertically overlap the portion of the conductive layer.
8. The electronic assembly as claimed in claim 6 , wherein the semiconductor device package has a first edge and a second edge adjacent to the first edge, the first edge and the second edge are substantially perpendicular to the long side, and the first edge is longer than the second edge from a top view perspective.
9. The electronic assembly as claimed in claim 6 , wherein the connection element is at least partially protruded beyond a top surface of the semiconductor device package.
10. The electronic assembly as claimed in claim 9 , wherein the connection element comprises a protrusion exposed by the semiconductor device package and having a curved surface.
11. The electronic assembly as claimed in claim 6 , wherein a distance between inner sidewalls of the connection element is greater than a distance between the connection element and the protection layer.
12. The electronic assembly as claimed in claim 11 , wherein the protection layer has at least two sides free from contacting the connection element.
13. The electronic assembly as claimed in claim 12 , wherein the at least two sides of the protection layer face the connection element.