Computing system and method for controlling storage device
According to one embodiment, a computing system transmits to a storage device a write request designating a first logical address for identifying first data to be written and a length of the first data. The computing system receives from the storage device the first logical address and a first physical address indicative of both of a first block selected from blocks except a defective block by the storage device, and a first physical storage location in the first block to which the first data is written. The computing system updates a first table which manages mapping between logical addresses and physical addresses of the storage device and maps the first physical address to the first logical address.
1 . A storage device comprising:
a control circuit connectable to a host device and including a write operation control unit; and
a plurality of nonvolatile memory dies, each of the plurality of nonvolatile memory dies including a plurality of memory blocks, wherein
the write operation control unit is configured:
to write data to the plurality of memory blocks;
to receive a write request and first data to be written from the host device, the write request designating a first logical address corresponding to the first data and a length of the first data;
in response to receiving the write request, to select a first writable memory block from among the plurality of memory blocks as a write destination block for the first data, and to write the first data to a first physical storage location in the first writable memory block; and
to transmit to the host device the first logical address and a first physical address, the first physical address being indicative of both of the first writable memory block and the first physical storage location, for updating, by the host device, mapping between a logical address and a physical address of the storage device.
2 . The storage device of claim 1 , wherein
the control circuit further includes a read operation control unit, and
the read operation control unit is configured:
to receive from the host device a read request designating the first physical address which is mapped to the first logical address by the host device.
3 . The storage device of claim 1 , wherein
the control circuit further includes a garbage collection operation control unit, and
the garbage collection operation control unit is configured:
to copy the first data from a previous physical storage location to a new physical storage location; and
to transmit to the host device the first logical address, a second physical address indicative of the previous physical storage location, and a third physical address indicative of the new physical storage location; and wherein
the host device is configured:
to obtain a current physical address mapped to the first logical address;
to update the mapping such that the third physical address is mapped to the first logical address when the second physical address matches the obtained current physical address; and
to maintain the current physical address without updating the mapping when the second physical address does not match the obtained current physical address.
4 . The storage device of claim 3 , wherein
in response to receiving a first command designating the second physical address from the host device, the control circuit is configured to invalidate data corresponding to the second physical address.
5 . The storage device of claim 1 , wherein
when the first data are updated data of previous data already written to the storage device, in response to receiving from the host device a first command designating a physical address corresponding to the previous data, the control circuit is configured to invalidate the previous data.
6 . The storage device of claim 1 , wherein
when the first data are updated data of previous data already written to the storage device and the previous data are duplicated data referred to by a plurality of logical addresses, in response to receiving from the host device a first command designating a physical address corresponding to the previous data, the control circuit is configured to decrement a reference count indicative of a number of logical addresses referring to the previous data.
7 . The storage device of claim 6 , wherein
the host device does not maintain the reference count.
8 . A storage device comprising:
a control circuitry connectable to a host device and including a read operation control unit and a garbage collection operation control unit; and
a plurality of nonvolatile memory dies, each of the plurality of nonvolatile memory dies including a plurality of memory blocks, wherein
the read operation control unit is configured:
to read data from the plurality of memory blocks;
to receive from the host device a read request of first data written to a first physical storage location of a first memory block from among the plurality of memory blocks, the read request designating a first physical address which is indicative of both the first memory block and the first physical storage location; and
in response to receiving the read request designating the first physical address, to transmit the first data to the host device without performing a logical-to physical address translation when reading of the first data; and wherein
the garbage collection operation control unit is configured:
to copy the first data from a previous physical storage location to a new physical storage location; and
to transmit to the host device a first logical address corresponding to the first data, a second physical address indicative of the previous physical storage location, and a third physical address indicative of the new physical storage location.
9 . The storage device of claim 8 , wherein
the host device is configured:
to obtain a current physical address mapped to the first logical address transmitted from the garbage collection operation control unit;
to update mapping such that the third physical address is mapped to the first logical address when the second physical address matches the obtained current physical address; and
to maintain the current physical address without updating the mapping when the second physical address does not match the obtained current physical address.
10 . The storage device of claim 8 , wherein
in response to receiving a first command designating the second physical address from the host device, the control circuit is configured to invalidate data corresponding to the second physical address.