IP Library › Granted Patent US 12,484,322
Granted Patent B2
US 12,484,322 · App. 18/021,312 · Granted Nov 25, 2025

Solid-state imaging device and electronic apparatus

Inventor: Tomoki Hiramatsu (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H10F39/1843H04N25/63H04N25/77H04N25/79H10F39/182H10F39/8037H10F39/8053H10F39/807
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Quick Facts
Patent No.
US 12,484,322
App. No.
18/021,312
Granted
Nov 25, 2025
Kind
B2
Abstract

The quantum efficiency can be improved. A solid-state imaging device according to an embodiment includes: a plurality of pixels ( 110 ) arranged in a matrix, in which each of the pixels includes a first semiconductor layer ( 35 ), a photoelectric conversion section (PD 1 ) disposed on the first semiconductor layer on a side of a first surface, an accumulation electrode ( 37 ) disposed on the first semiconductor layer close to a side of a second surface on a side opposite to the first surface, a wiring ( 61, 62, 63, 64 ) extending from the second surface of the first semiconductor layer, a floating diffusion region (FD 1 ) connected to the first semiconductor layer via the wiring, and a first gate ( 11 ) that forms a potential barrier in a charge flow path from the first semiconductor layer to the floating diffusion region via the wiring.

Claims (72)

1 . A solid-state imaging device including:

a plurality of pixels arranged in a matrix, wherein

each of the pixels includes

a first semiconductor layer,

a photoelectric conversion section disposed on the first semiconductor layer on a side of a first surface,

an accumulation electrode disposed on the first semiconductor layer close to a side of a second surface on a side opposite to the first surface,

a wiring extending from the second surface of the first semiconductor layer,

a floating diffusion region connected to the first semiconductor layer via the wiring,

a first gate that forms a potential barrier in a charge flow path from the first semiconductor layer to the floating diffusion region via the wiring, where the first gate is a fixed charge film having a same polarity as a polarity of a charge generated by photoelectric conversion by the photoelectric conversion section.

2 . The solid-state imaging device according to claim 1 , wherein

the first gate is disposed on a same plane as the accumulation electrode.

3 . The solid-state imaging device according to claim 1 , wherein

the first gate is disposed on a side opposite to the floating diffusion region sandwiching the accumulation electrode.

4 . The solid-state imaging device according to claim 3 , wherein

a part of the first gate overlaps the accumulation electrode in a direction vertical to a main plane of the first semiconductor layer.

5 . The solid-state imaging device according to claim 1 , wherein

the first gate is disposed on a side opposite to the first semiconductor layer sandwiching the accumulation electrode.

6 . The solid-state imaging device according to claim 1 , wherein

each of the pixels further includes a shield layer disposed at a boundary with an adjacent pixel and forming a potential barrier that suppresses outflow of a charge from each pixel to an adjacent pixel.

7 . The solid-state imaging device according to claim 6 , wherein

the shield layer is disposed on a same plane as the accumulation electrode.

8 . The solid-state imaging device according to claim 6 , wherein

the shield layer is disposed on a side opposite to the first semiconductor layer sandwiching the accumulation electrode.

9 . The solid-state imaging device according to claim 6 , wherein

the shield layer is disposed on a side opposite to the floating diffusion region sandwiching the accumulation electrode.

10 . The solid-state imaging device according to claim 9 , wherein

a part of the shield layer overlaps the accumulation electrode in a direction vertical to a main plane of the first semiconductor layer.

11 . The solid-state imaging device according to claim 1 , wherein

a cross section of the wiring is circular or polygonal.

12 . The solid-state imaging device according to claim 1 , wherein

the wiring has a tapered shape having diameter decreasing from the first semiconductor layer to the floating diffusion region.

13 . The solid-state imaging device according to claim 1 , wherein

adjacent pixels among the plurality of pixels are connected to a common floating diffusion region.

14 . The solid-state imaging device according to claim 1 , wherein

the photoelectric conversion section is an organic film.

15 . The solid-state imaging device according to claim 1 , wherein

the first semiconductor layer includes

a first layer in contact with the photoelectric conversion section, and

a second layer positioned on a side opposite to the photoelectric conversion section sandwiching the first layer.

16 . An electronic apparatus including:

the solid-state imaging device according to claim 1 ;

a lens that forms an image of incident light on the solid-state imaging device; and

a processing circuit that executes predetermined processing on a signal output from the solid-state imaging device.

17 . A solid-state imaging device including:

a plurality of pixels arranged in a matrix, wherein

each of the pixels includes

a first semiconductor layer,

a photoelectric conversion section disposed on the first semiconductor layer on a side of a first surface,

an accumulation electrode disposed on the first semiconductor layer close to a side of a second surface on a side opposite to the first surface,

a wiring extending from the second surface of the first semiconductor layer,

a floating diffusion region connected to the first semiconductor layer via the wiring,

a first gate that forms a potential barrier in a charge flow path from the first semiconductor layer to the floating diffusion region via the wiring,

a shield layer disposed at a boundary with an adjacent pixel and forming a potential barrier that suppresses outflow of a charge from each pixel to an adjacent pixel, and

wherein the shield layer is a fixed charge film having a same polarity as a polarity of a charge generated by photoelectric conversion by the photoelectric conversion section.

18 . A solid-state imaging device including:

a plurality of pixels arranged in a matrix, wherein

each of the pixels includes

a first semiconductor layer,

a photoelectric conversion section disposed on the first semiconductor layer on a side of a first surface,

an accumulation electrode disposed on the first semiconductor layer close to a side of a second surface on a side opposite to the first surface,

a wiring extending from the second surface of the first semiconductor layer,

a floating diffusion region connected to the first semiconductor layer via the wiring,

a first gate that forms a potential barrier in a charge flow path from the first semiconductor layer to the floating diffusion region via the wiring,

a second gate disposed close to the wiring at a position closer to the floating diffusion region than the first gate, and

a memory electrode disposed close to the wiring at a position between the first gate and the second gate.

19 . The solid-state imaging device according to claim 18 , wherein

each of the pixels further includes a second semiconductor layer positioned between the first semiconductor layer and the floating diffusion region, the wiring includes

a first wiring extending from the first semiconductor layer and connected to the second semiconductor layer, and

a second wiring extending from the second semiconductor layer and connected to the floating diffusion region,

the first gate is disposed close to the first wiring,

the memory electrode is disposed close to the second semiconductor layer, and

the second gate is disposed close to the second wiring.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2023
From: HIRAMATSU, TOMOKI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 062695/0456 →
Priority Claims (1)
JP 2020-161365 · Sep 25, 2020 · national
Continuity (1)
Related Publication 20230230999A1 · Jul 20, 2023
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