IP Library Granted Patent US 12,489,041
Granted Patent B2
US 12,489,041 · App. 17/956,787 · Granted Dec 2, 2025

Semiconductor module, semiconductor device, and semiconductor device manufacturing method

Inventors: Tadahiko Sato (Matsumoto, JP); Ryoichi Kato (Matsumoto, JP); Yuma Murata (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L23/49811H01G2/06H01L21/4853H01R4/029H01R12/55H01R43/0221H01L24/32H01L24/40H01L24/48H01L24/73H01L25/072H01L25/18H01L2224/32225H01L2224/40225H01L2224/48225H01L2224/73221H01L2224/73263H01L2224/73265H01L2924/13055H01L2924/13091
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Quick Facts
Patent No.
US 12,489,041
App. No.
17/956,787
Granted
Dec 2, 2025
Kind
B2
Abstract

A semiconductor module includes an insulating sheet which has a first surface and extends in a first direction and a first terminal. The first terminal has a first region disposed on the first surface of the insulating sheet and having a first width in a second direction perpendicular to the first direction, a second region extending from the first region and having a second width in the second direction narrower than the first width, and a third region located away from the first surface and being electrically connected to both the first region and the second region.

Claims (30)

1 . A semiconductor module, comprising:

an insulating sheet that has a first surface and extends in a first direction in a plan view of the semiconductor module; and

a first terminal that has

a first region disposed on the first surface of the insulating sheet and having a first width in a second direction perpendicular to the first direction in the plan view,

a second region extending from the first region and having a second width in the second direction narrower than the first width in the plan view, and

a third region located away from the first surface and being electrically connected to both the first region and the second region, wherein:

the insulating sheet is a planar sheet and has a first surface side where the first surface is provided; and

the first region, the second region and the third region are arranged at the first surface side of the insulating sheet, and are arranged within the first surface in the plan view.

2 . The semiconductor module according to claim 1 , wherein, in a third direction that is perpendicular to the first surface, an upper surface of the first region opposite to a rear surface of the first region that faces the first surface of the insulating sheet is located closer to the insulating sheet than is a rear surface of the third region facing the first surface of the insulating sheet.

3 . The semiconductor module according to claim 1 , wherein the third region overlaps the first region in the plan view.

4 . The semiconductor module according to claim 1 , wherein the third region is located outside the first region in the plan view.

5 . The semiconductor module according to claim 1 ,

wherein the first region has a wide portion having the first width in the second direction and a narrow portion extending from the wide portion in the first direction and having a third width in the second direction narrower than the first width in the plan view,

wherein the second region extends from one side of the wide portion that extends in the second direction, and

wherein the third region extends from the second region in the first direction.

6 . The semiconductor module according to claim 5 , wherein the narrow portion extends in the first direction from a portion of the one side that includes one of opposite ends of the one side in the plan view.

7 . The semiconductor module according to claim 5 , wherein the narrow portion extends in the first direction from a portion of the one side that is disposed away from one of opposite ends of the one side in the plan view.

8 . The semiconductor module according to claim 1 ,

wherein the first region has a wide portion having the first width in the second direction and a narrow portion extending from the wide portion in the first direction and having a third width in the second direction narrower than the first width in the plan view,

wherein the second region extends from one side of the narrow portion that extends in the first direction, and

wherein the third region extends from the second region in the second direction.

9 . The semiconductor module according to claim 8 , wherein the narrow portion extends in the first direction from a portion of one side of the wide portion that extends in the second direction and that includes one of opposite ends of the one side of the wide portion in the plan view.

10 . The semiconductor module according to claim 8 , wherein the narrow portion extends in the first direction from a portion of one side of the wide portion that extends in the second direction and that is disposed away from one of opposite ends of the one side of the wide portion in the plan view.

11 . The semiconductor module according to claim 1 , further comprising a second terminal disposed on a second surface of the insulating sheet, the second surface being opposite to the first surface.

12 . A semiconductor device, comprising:

the semiconductor module according to claim 1 ; and

a connection member welded to the third region.

13 . The semiconductor device according to claim 12 , wherein the connection member is welded to a rear surface of the third region that faces the first surface of the insulating sheet.

14 . The semiconductor device according to claim 13 , wherein the connection member has a welding area that is welded to the rear surface of the third region and an opening through which the second region penetrates the connection member.

15 . The semiconductor device according to claim 12 , further comprising a capacitor including a third terminal connected to the connection member.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2022
From: SATO, TADAHIKO; KATO, RYOICHI; MURATA, YUMA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 061262/0182 →
Priority Claims (1)
JP 2021-180714 · Nov 5, 2021 · national
Continuity (1)
Related Publication 20230142607A1 · May 11, 2023
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