IP Library › Granted Patent US 12,500,156
Granted Patent B2
US 12,500,156 · App. 18/268,186 · Granted Dec 16, 2025

Circuit board

Inventors: Se Woong Na (Seoul, KR); Sang Il Kim (Seoul, KR); Jung Eun Han (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
H01L23/49822H01L21/4857H05K1/0296H05K3/28H05K3/381
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Quick Facts
Patent No.
US 12,500,156
App. No.
18/268,186
Granted
Dec 16, 2025
Kind
B2
Abstract

A circuit board according to an embodiment includes an insulating layer; a circuit pattern disposed on the insulating layer; and a protective layer disposed on the insulating layer and the circuit pattern, and including first and second regions having different heights; wherein the circuit pattern includes: a first-first circuit pattern corresponding to the first region of the protective layer; and a first-second circuit pattern corresponding to the second region of the protective layer, wherein a height of the first region of the protective layer is lower than a height of the first-first circuit pattern, wherein a height of the second region of the protective layer is higher than a height of the first-second circuit pattern, wherein a surface of the first-first circuit pattern includes: a first portion in contact with the first region of the protective layer, and a second portion excluding the first portion, and wherein a surface roughness Ra of the first portion is different from a surface roughness Ra of the second portion.

Claims (23)

1 . A circuit board comprising:

a build-up insulating structure including a plurality of insulating layers laminated along a vertical direction;

a protective layer disposed on the build-up insulating structure and including a first region having a first thickness and a second region having a second thickness greater than the first thickness; and

a circuit pattern part including a first circuit pattern passing through the first region and a second circuit pattern embedded in the second region,

wherein the first circuit pattern includes an upper surface and a side surface,

wherein the side surface includes a first portion in contact with the protective layer; and a second portion provided on the first portion and not in contact with the protective layer, and

wherein a surface roughness of the second portion of the side surface and the upper surface of the first circuit pattern satisfies 80% to 90% of a surface roughness of the first portion of the side surface.

2 . The circuit board of claim 1 , wherein the second portion is spaced apart from the second region of the protective layer in a horizontal direction.

3 . The circuit board of claim 1 , wherein the second portion of the side surface of the first circuit pattern does not overlap with the first region of the protective layer in a horizontal direction.

4 . The circuit board of claim 2 , wherein the second portion of the side surface of the first circuit pattern overlaps the second region of the protective layer in a horizontal direction.

5 . The circuit board of claim 2 , wherein the first circuit pattern includes a pad and a trace spaced apart in a horizontal direction, and

wherein each of the pad and the trace includes the first and second portions.

6 . The circuit board of claim 2 , wherein the first thickness of the protective layer satisfies a range of 70% to 90% of a thickness of the first circuit pattern.

7 . The circuit board of claim 2 , wherein a length of the second portion of the side surface of the first circuit pattern in a vertical direction satisfies a range of 3 μm to 9 μm.

8 . The circuit board of claim 2 , wherein the second circuit pattern having upper and side surfaces entirely covered with the second region of the protective layer.

9 . The circuit board of claim 2 , wherein a surface roughness of an upper surface of the first region of the protective layer is different from a surface roughness of an upper surface of the second region.

10 . The circuit board of claim 8 , wherein a surface roughness of the side surface of the second circuit pattern is the same as the surface roughness of the first portion of the side surface of the first circuit pattern.

11 . The circuit board of claim 10 , wherein the surface roughness of the side surface of the second circuit pattern is greater than the surface roughness of the second portion of the side surface of the first circuit pattern, and

wherein the surface roughness of the second portion of the side surface and the upper surface of the first circuit pattern satisfies 80% to 90% of the surface roughness of the second circuit pattern.

12 . The circuit board of claim 11 , wherein the surface roughness (Ra) of the first portion of the side surface of the first circuit pattern and the side surface of the second circuit pattern satisfies a range of 510 nm to 580 nm, and

wherein the surface roughness (Ra) of the second portion of the side surface and the upper surface of the first circuit pattern satisfies a range of 440 nm to 510 nm.

13 . The circuit board of claim 9 , wherein the protective layer has an inner surface connecting the upper surface of the first region and the upper surface of the second region, and

wherein a surface roughness of the inner surface is different from the surface roughness of the upper surface of the first region and the surface roughness of the upper surface of the second region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2023
From: NA, SE WOONG; KIM, SANG IL; HAN, JUNG EUN
To: LG INNOTEK CO., LTD.
Reel/Frame 063998/0981 →
Priority Claims (2)
KR 10-2020-0177287 · Dec 17, 2020 · national
KR 10-2020-0177383 · Dec 17, 2020 · national
Continuity (1)
Related Publication 20240063104A1 · Feb 22, 2024
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