Granted Patent B2

US 12,547,492 · App. 18/506,155 · Granted Feb 10, 2026

Inventors: Mohith Kumar N (Bangalore, IN); Sri Harsha Chintamaneni (Bangalore, IN)

Assignee: Sandisk Technologies, Inc.

G06F11/085

Abstract

Claims (47)

1 . An apparatus comprising:

one or more control circuits configured to connect to a plurality of nonvolatile memory cells,

the one or more control circuits are configured to:

perform Error Correction Code (ECC) encoding of a plurality of portions of data to be stored in the plurality of memory cells and perform Exclusive OR (XOR) operations on the plurality of portions such that each portion is subject to at least two separate XOR operations that generate different XOR data and in response to determining that a first portion of user data from the plurality of nonvolatile memory cells that was found to be uncorrectable by ECC is unrecoverable by a first XOR operation using first XOR data and a second portion of user data, recover the first portion of user data by a second XOR operation using second XOR data that is different to the first XOR data and a third portion of user data that is different to the second portion of user data.

2 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to generate the first and second XOR data when storing the first, second and third portions of user data in the plurality of nonvolatile memory cells.

3 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to perform XOR operations on portions of user data assigned to four planes of a Flash Interface Module (FIM) such that each portion of data in a plane is subject to XOR operations with user data from at least two other planes.

4 . The apparatus of claim 3 , wherein the one or more control circuits are configured to generate four pages of XOR data for four pages of user data assigned to the four planes of a FIM.

5 . The apparatus of claim 1 , wherein the first portion of data is written in the plurality of nonvolatile memory cells in Multi Level Cell (MLC) format and the first and second XOR data are written in the plurality of nonvolatile memory cells in Single Level Cell (SLC) format.

6 . The apparatus of claim 5 , wherein the one or more control circuits are further configured to delete the first and second XOR data after the first portion of data is confirmed as written in MLC format with an acceptable error rate.

7 . The apparatus of claim 1 , wherein:

the one or more control circuits are located on a memory controller die;

the plurality of nonvolatile memory cells are located on a plurality of memory dies; and

the first, second and third portions of user data and the first and second XOR data are stored in nonvolatile memory cells of the plurality of memory dies.

8 . The apparatus of claim 7 , wherein the memory controller die includes a plurality of Flash Interface Modules (FIMs), each FIM connected to a plurality of nonvolatile memory dies and the one or more control circuits are located in a FIM of the plurality of FIMs.

9 . A method comprising:

performing Error Correction Code (ECC) encoding of a plurality of portions of data to be stored in the plurality of memory cells;

performing first Exclusive OR (XOR) operations on the plurality of portions of data such that each portion is XORed with at least one other portion to generate first XOR data;

performing second XOR operations on the plurality of portions of data such that each portion is additionally XORed with a different at least one other portion to generate second XOR data that is different to the first XOR data;

reading a first portion of user data from a plurality of nonvolatile memory cells;

performing ECC decoding of the first portion of user data;

determining that the first portion of user data is uncorrectable by ECC;

identifying a second portion of user data stored in the plurality of nonvolatile memory cells and a first portion of XOR data that is an XOR product of the first and second portions of user data;

determining that at least one of the second portion of user data or the first portion of XOR data is uncorrectable by ECC;

in response to determining that at least one of the second portion of user data or the first portion of XOR data is uncorrectable by ECC, identifying a third portion of user data that is different to the second portion of user data and is stored in the plurality of nonvolatile memory cells and a second portion of XOR data that is an XOR product of the second and third portions of user data, the second portion of XOR data is different to the first portion of XOR data; and

performing an XOR operation on the third portion of user data and the second portion of XOR data to generate a copy of the first portion of user data.

10 . The method of claim 9 , wherein:

reading the first portion of user data includes reading nonvolatile memory cells that are configured as Tri Level Cell (TLC) memory cells to store the first portion of user data; and

the second and third portions of data and the first and second portions of XOR data are stored in nonvolatile memory cells that are configured as Single Level Cell (SLC) memory cells.

11 . The method of claim 10 , wherein the TLC memory cells are located in a user data block coupled to a Flash Interface Module (FIM) and the SLC memory cells are in an XOR block connected to the FIM.

12 . The method of claim 10 , further comprising:

storing the copy of the first portion of user data in the TLC memory cells; and

verifying that the copy of the first portion of user data in the TLC memory cells has an error rate below a threshold error rate.

13 . The method of claim 12 , further comprising:

subsequently, in response to verifying that the copy of the first portion of user data in the TLC memory cells has an error rate below the threshold error rate, erasing the second and third portions of data and the first and second portions of XOR data from the SLC memory cells.

14 . The method of claim 9 , further comprising:

subsequently sending the copy of the first portion of user data to a host in response to a host read command directed to the first portion of data.

15 . The method of claim 9 , further comprising, prior to reading the first portion of user data from the plurality of nonvolatile memory cells:

receiving the first, second and third portions of user data; and

performing XOR operations to generate the first XOR data from the first and second portions of user data and to generate the second XOR data from the second and third portions of user data.

16 . The method of claim 15 , further comprising:

writing the first, second and third portions of user data in a first metablock formed of a first subset of the plurality of nonvolatile memory cells; and

writing the first and second XOR data in a second metablock formed of a second subset of the plurality of nonvolatile memory cells.

17 . A data storage system comprising:

a plurality of nonvolatile memory cells; and

means for performing XOR operations on portions of data to be stored in the plurality of nonvolatile memory cells such that each portion of user data is XORed with at least a first portion of user data to generate first XOR data and with a second portion of user data that is different to the first portion of user data to generate second XOR data that is different to the first XOR data to provide at least two ways to generate a portion of user data from XOR data and other user data such that a portion of data that is uncorrectable by ECC and by a first XOR operation using the first portion of user data with the first XOR data is recoverable by a second XOR operation using the second portion of user data with the second XOR data.

18 . The data storage system of claim 17 , wherein the plurality of nonvolatile memory cells are located on a memory die and the means for performing XOR operations are located on a controller die.

19 . The data storage system of claim 17 , wherein the plurality of nonvolatile memory cells are NAND flash memory cells that are configurable for operation as Single Level Cell (SLC) or Multi Level Cell (MLC) cells, all portions of user data are initially stored in nonvolatile memory cells configured as SLC cells and subsequently copied to nonvolatile memory cells configured as MLC cells and the at least two portions of XOR data are stored in nonvolatile memory cells configured as SLC cells.

Assignments (8)

Continuity (1)

References Cited (13)