Method of fabricating a semiconductor device
A method for fabricating a semiconductor device includes sequentially stacking a sacrificial layer and a support layer on a substrate, forming bottom electrodes penetrating the sacrificial layer and the support layer to come into contact with the substrate, patterning the support layer to form a support pattern that connects the bottom electrodes to each other, removing the sacrificial layer to expose surfaces of the bottom electrodes, depositing a conductive layer on the exposed surfaces of the bottom electrodes and a surface of the support pattern, and etching the conductive layer. The etching the conductive layer includes selectively removing the conductive layer on the support pattern to expose the surface of the support pattern. The depositing the conductive layer and the etching the conductive layer are alternately performed in a same chamber.
1 . A method of fabricating a semiconductor device, the method comprising:
sequentially stacking a sacrificial layer and a support layer on a substrate;
forming bottom electrodes penetrating the sacrificial layer and the support layer to come into contact with the substrate;
patterning the support layer to form a support pattern that connects the bottom electrodes to each other;
removing the sacrificial layer to expose surfaces of the bottom electrodes;
depositing a conductive layer on the exposed surfaces of the bottom electrodes and a surface of the support pattern; and
etching the conductive layer,
wherein the etching the conductive layer includes selectively removing the conductive layer on the support pattern to expose the surface of the support pattern, and
wherein the depositing the conductive layer and the etching the conductive layer are alternately performed in a same chamber.
2 . The method of claim 1 , wherein,
the patterning the support layer includes forming the support pattern in contact with portions of lateral surfaces of the bottom electrodes, and
the etching the conductive layer includes etching the conductive layer such that remaining lateral surfaces of the bottom electrodes are surrounded by the conductive layer, the remaining lateral surfaces of the bottom electrodes excluding the portions of lateral surfaces of the bottom electrodes.
3 . The method of claim 1 , further comprising:
forming a dielectric layer that surrounds the bottom electrodes, the support pattern, and the conductive layer; and
forming a top electrode on the dielectric layer.
4 . The method of claim 3 , wherein the forming the dielectric layer forms the dielectric layer spaced apart from the bottom electrode with the conductive layer interposed therebetween.
5 . The method of claim 1 , wherein an etch rate of the conductive layer is higher on the surface of the support pattern than on the exposed surfaces of the bottom electrodes.
6 . The method of claim 1 , wherein the etching the conductive layer etches the conductive layer with a gaseous compound including at least one of fluorine (F) or chlorine (Cl).
7 . The method of claim 1 , wherein
the depositing the conductive layer deposits the conductive layer by atomic layer deposition, and
the etching the conductive layer etches the conductive layer by atomic layer etching.
8 . The method of claim 1 , wherein the conductive layer includes at least one of niobium (Nb), tantalum (Ta), tin (Sn), molybdenum (Mo), titanium (Ti), indium (In), nickel (Ni), cobalt (Co), tungsten (W), or ruthenium (Ru).
9 . A method of fabricating a semiconductor device, the method comprising:
providing a dielectric layer including an opening on a substrate;
forming bottom electrode contacts in the opening of the dielectric layer, the bottom electrode contacts being in contact with a top surface of the substrate;
sequentially stacking a first sacrificial layer, a first support layer, a second sacrificial layer, and a second support layer on the dielectric layer;
forming bottom electrodes penetrating the first sacrificial layer, the first support layer, the second sacrificial layer, and the second support layer to come into contact with the bottom electrode contacts;
forming a mask on the second support layer to pattern the second support layer, the second sacrificial layer, and the first support layer;
removing the first sacrificial layer and the second sacrificial layer to expose the bottom electrodes;
depositing a conductive layer on surfaces of the bottom electrodes, a surface of the first support layer, and a surface of the second support layer;
performing an etching process on the conductive layer, the etching process being in-situ performed after the conductive layer is deposited;
forming a capacitor dielectric layer surrounding the first support layer, the second support layer, and the conductive layer; and
forming a top electrode on the capacitor dielectric layer,
wherein, after depositing the conductive layer and etching the conductive layer, the conductive layer remains on the surfaces of the bottom electrode, and the conductive layer is removed from the surface of the first support layer and the surface of the second support layer, and
wherein etching the conductive layer is performed with a gaseous compound including at least one of fluorine (F) or chlorine (Cl).
10 . The method of claim 9 , wherein the depositing the conductive layer and the etching the conductive layer are performed in a same chamber.
11 . The method of claim 9 , wherein
the sequentially stacking stacks the first support layer and the second support layer vertically spaced apart from each other, and
the forming the bottom electrodes forms the bottom electrodes such that the first support layer and the second support layer connect the bottom electrodes to each other.
12 . The method of claim 9 , wherein
the depositing the conductive layer deposits the conductive layer by atomic layer deposition, and
the etching the conductive layer etches the conductive layer by atomic layer etching.
13 . The method of claim 9 , wherein an etch rate of the conductive layer on the first support layer and the second support layer is higher than an etch rate of the conductive layer on the bottom electrode.
14 . The method of claim 9 , wherein the forming the capacitor dielectric layer forms the capacitor dielectric layer such that the conductive layer is between the bottom electrode and the capacitor dielectric layer.
15 . The method of claim 9 , wherein the conductive layer includes at least one of niobium (Nb), tantalum (Ta), tin (Sn), molybdenum (Mo), titanium (Ti), indium (In), nickel (Ni), cobalt (Co), tungsten (W), or ruthenium (Ru).
16 . A method of fabricating a semiconductor device, the method comprising:
stacking a sacrificial layer and a support layer on a substrate;
forming bottom electrodes penetrating the sacrificial layer and the support layer;
patterning the support layer to form a support pattern;
removing the sacrificial layer to expose the bottom electrodes;
depositing a conductive layer on surfaces of the bottom electrodes and a surface of the support pattern;
etching the conductive layer to expose the surface of the support pattern; and
forming a dielectric layer on an exposed surface of the conductive layer and the exposed surface of the support pattern,
wherein the depositing the conductive layer deposits the conductive layer by atomic layer deposition,
wherein etching the conductive layer etches the conductive layer by atomic layer etching, and
wherein an etch rate of the conductive layer on the support pattern is higher than an etch rate of the conductive layer on the bottom electrode.
17 . The method of claim 16 , wherein
the patterning the support pattern patterns the support pattern such that portions of lateral surfaces of the bottom electrodes are in contact with the support pattern, and
the depositing the conductive layer deposits the conductive layer such that surfaces of the bottom electrodes not in contact with the support pattern are surrounded by the conductive layer.
18 . The method of claim 16 , wherein the etching the conductive layer and the depositing the conductive layer are alternately performed in a same chamber.
19 . The method of claim 16 , wherein the etching the conductive layer includes etching the conductive layer with a gaseous compound including at least one of fluorine (F) or chlorine (Cl).
20 . The method of claim 16 , further comprising:
forming a top electrode on the dielectric layer after etching the conductive layer.