Magnetoresistive memory device and method of operating same using phase controlled magnetic anisotropy
A magnetoresistive memory cell includes a first terminal electrode, a second terminal electrode, and a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and including, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a material layer having two different states of lattice deformation which have different average in-plane lattice constants and which are configured to apply different in-plane stress. The material layer may be a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state.
1 . A memory device comprising a magnetoresistive memory cell which comprises:
a first terminal electrode;
a second terminal electrode; and
a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a material layer having two different states of lattice deformation which have different average in-plane lattice constants and which are configured to apply different in-plane stress, wherein:
the free layer is in direct contact with the dielectric tunnel barrier layer on one side and is in direct contact with the material layer on another side;
the material layer comprises a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state;
the memory device further comprises a programming circuit configured to apply a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state; and
the magnetoresistive layer stack is configured to restore the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer after the MIT material layer reverts to the insulator state upon cooling after the programming voltage pulse is turned off.
2 . The memory device of claim 1 , wherein the MIT material comprises VO 2 , a Mott insulator material, or a perovskite material.
3 . The memory device of claim 1 , wherein:
the free layer has a first perpendicular magnetic anisotropy having a first magnitude under a condition in which the MIT material layer is in the insulator state; and
the first magnitude is large enough to store written information.
4 . The memory device of claim 3 , wherein:
the free layer has a second perpendicular magnetic anisotropy having a second magnitude under a condition in which the MIT material layer is in a metal state; and
the second magnitude is lower than the first magnitude.
5 . The memory device of claim 1 , further comprising a sensing circuit configured to apply a sensing voltage pulse across the magnetoresistive memory cell, wherein a magnitude of the sensing voltage pulse is insufficient to induce a phase transition in the MIT material layer.
6 . The memory device of claim 5 , wherein:
the reference layer, the dielectric tunnel barrier layer, and the free layer are configured to provide a tunneling magnetoresistance effect; and
the sensing circuit is configured to determine alignment of magnetization directions of the reference layer and the free layer based on a magnitude of a measured sensing current through the magnetoresistive memory cell.
7 . The memory device of claim 1 , wherein the free layer comprises a ferromagnetic material having a lower perpendicular magnetic anisotropy under a first condition in which the MIT material layer is in the metal state relative to a second condition in which the MIT material layer is in the insulator state.
8 . The memory device of claim 1 , further comprising additional magnetoresistive memory cells.
9 . The memory device of claim 1 , further comprising a sensing circuit configured to retrieve data stored in the free layer through a tunneling magnetoresistive resistance (TMR) effect at a sensing voltage which is lower than the programming voltage.
10 . A method of operating the magnetoresistive memory cell comprising a first terminal electrode, a second terminal electrode, and a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a metal-insulator transition (MIT) material layer in direct contact with the free layer, the method comprising:
applying a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state; and
cooling the MIT material layer to revert to the insulator state after the programming voltage pulse is turned off, thereby restoring the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer.
11 . The method of claim 10 , wherein
the free layer has a first perpendicular magnetic anisotropy having a first magnitude under a condition in which the MIT material layer is in the insulator state; and
the first magnitude is large enough to store written information.
12 . The method of claim 11 , wherein:
the free layer has a second perpendicular magnetic anisotropy having a second magnitude under a condition in which the MIT material layer is in a metal state; and
the second magnitude is smaller than the first magnitude.
13 . The method of claim 10 , further comprising:
applying a sensing voltage pulse across the magnetoresistive memory cell, wherein a magnitude of the sensing voltage pulse is insufficient to induce a phase transition in the MIT material layer; and
determining alignment of magnetization directions of the reference layer and the free layer based on a magnitude of a measured sensing current through the magnetoresistive memory cell.
14 . The method of claim 10 , wherein the programming voltage pulse comprises a first programming voltage pulse that causes electrical current flow from the first terminal electrode through the MIT material layer toward the second terminal electrode, or a second programming voltage pulse that causes electrical current flow from the second terminal electrode through the MIT material layer toward the first terminal electrode.
15 . A memory device comprising a magnetoresistive memory cell which comprises:
a first terminal electrode;
a second terminal electrode;
a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state which comprise different states of lattice deformation having different average in-plane lattice constants and which are configured to apply different in-plane stress, wherein the free layer is in direct contact with the dielectric tunnel barrier layer on one side and is in direct contact with the material layer on another side;
a programming circuit configured to apply a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state; and
a sensing circuit configured to apply a sensing voltage pulse across the magnetoresistive memory cell while the MIT material layer is in the insulator state, wherein a magnitude of the sensing voltage pulse is insufficient to induce a phase transition in the MIT material layer and enables retrieval of data stored in the free layer through a tunneling magnetoresistance effect,
wherein the magnetoresistive layer stack is configured to restore the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer after the MIT material layer reverts to the insulator state upon cooling after the programming voltage pulse is turned off.
16 . The memory device of claim 15 , wherein the sensing circuit is configured to determine alignment of magnetization directions of the reference layer and the free layer based on a magnitude of a measured sensing current through the magnetoresistive memory cell.
17 . The memory device of claim 15 , wherein the programming circuit is configured to apply a programming voltage pulse that is selected from:
a first programming voltage pulse that applies a positive voltage to the first terminal electrode relative to the second terminal electrode; and
a second programming voltage pulse that applies a negative voltage to the first terminal electrode relative to the second terminal electrode;
wherein the free layer has a first perpendicular magnetic anisotropy having a first magnitude under a condition in which the MIT material layer is in the insulator state; and
the first magnitude is large enough to store written information.
18 . The memory device of claim 15 , wherein the programming voltage pulse is bidirectional, irrespective of whether the programming current flows from the first terminal electrode toward the second terminal electrode or from the second terminal electrode toward the first terminal electrode; and the free layer has a first perpendicular magnetic anisotropy having a first magnitude in the insulator state that is large enough to store written information, and a second perpendicular magnetic anisotropy having a second magnitude in the metal state that is lower than the first magnitude.
19 . The memory device of claim 15 , wherein the programming voltage pulse induces a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state; and the magnetoresistive layer stack is configured to restore the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer after the MIT material layer reverts to the insulator state upon cooling after the programming voltage pulse is turned off.
20 . The memory device of claim 15 , wherein:
the free layer has a first perpendicular magnetic anisotropy having a first magnitude under a condition in which the MIT material layer is in the insulator state; and
the first magnitude is large enough to store written information;
the free layer has a second perpendicular magnetic anisotropy having a second magnitude under a condition in which the MIT material layer is in the metal state; and
the second magnitude is lower than the first magnitude.