IP Library › Granted Patent US 12,614,004
Granted Patent B2
US 12,614,004 · App. 18/438,481 · Granted Apr 28, 2026

Detection of security attacks through die-attach pad

Inventors: Yuval Kirschner (Even Yehuda, IL); Tamir Golan (Kibbutz Givaat-Chaim Meuchad, IL)
Assignee: Nuvoton Technology Corp.
G06F21/87G01R31/2853G06F21/554
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Quick Facts
Patent No.
US 12,614,004
App. No.
18/438,481
Granted
Apr 28, 2026
Kind
B2
Abstract

An electronic device includes an Integrated Circuit (IC) and a package including a die-attach pad for connecting the IC. The IC includes (i) a measurement circuit configured to measure an electrical characteristic of the die-attach pad, and (ii) a security control circuit configured to initiate a responsive action responsively to detecting a deviation of the measured electrical characteristic of the die-attach pad from an initial measurement of the electrical characteristic.

Claims (23)

1 . An electronic device, comprising:

an Integrated Circuit (IC);

a package; and

a die-attach pad that connects the IC to the package,

wherein the IC comprises:

a measurement circuit, configured to measure a capacitance between the die-attach pad and a metal deposition layer in the IC; and

a security control circuit, configured to initiate a responsive action responsively to detecting a deviation of the measured capacitance from an initial measurement of the capacitance.

2 . An electronic device, comprising:

an Integrated Circuit (IC);

a package; and

a die-attach pad that connects the IC to the package,

wherein the IC comprises:

a measurement circuit, configured to measure a resistance between at least two wires that are bonded to the die-attach pad; and

a security control circuit, configured to initiate a responsive action responsively to detecting a deviation of the measured resistance from an initial measurement of the resistance.

3 . The electronic device according to claim 1 , wherein the IC further comprises a non-volatile memory (NVM), configured to store the initial measurement of the capacitance.

4 . The electronic device according to claim 3 , wherein the NVM is programmed with the initial measurement during manufacturing of the electronic device.

5 . The electronic device according to claim 1 , further comprising a glue or a film for connecting the IC to the die-attach pad.

6 . A method for securing an electronic device that includes an Integrated Circuit (IC) and a package comprising a die-attach pad that connects the IC to the package, the method comprising:

measuring a capacitance between the die-attach pad and a metal deposition layer in the IC; and

initiating a responsive action responsively to detecting a deviation of the measured capacitance from an initial measurement of the capacitance.

7 . The method according to claim 6 , further comprising storing the initial measurement of the capacitance in a non-volatile memory (NVM) in the IC.

8 . The method according to claim 7 , wherein storing the initial measurement comprises programming the NVM with the initial measurement during manufacturing of the electronic device.

9 . The method according to claim 6 , further comprising a glue or a film for connecting the IC to the die-attach pad.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2024
From: KIRSCHNER, YUVAL; GOLAN, TAMIR
To: NUVOTON TECHNOLOGY CORPORATION
Reel/Frame 069196/0953 →
Continuity (1)
Related Publication 20250258965A1 · Aug 14, 2025
References Cited (23)
US 8816717B2 · Fritz et al. · 2014 [cited by applicant]
US 9514308B2 · Filippi et al. · 2016 [cited by applicant]
US 9965652B2 · Joharapurkar · 2018 [cited by examiner]
US 10347595B2 · Champeix · 2019 [cited by examiner]
US 10579833B1 · Cook · 2020 [cited by examiner]
US 11074370B2 · Sugahara · 2021 [cited by examiner]
US 11502047B2 · Best et al. · 2022 [cited by applicant]
US 11636907B2 · Hershman · 2023 [cited by examiner]
US 20100026313A1 · Bartley et al. · 2010 [cited by applicant]
US 20110227603A1 · Leon · 2011 [cited by examiner]
US 20130206843A1 · McCarthy · 2013 [cited by examiner]
US 20140035136A1 · Buer et al. · 2014 [cited by applicant]
US 20150108606A1 · Lamy · 2015 [cited by examiner]
US 20170004686A1 · Zacchio · 2017 [cited by examiner]
US 20190051643A1 · Fronte · 2019 [cited by examiner]
US 20190278945A1 · Sugahara · 2019 [cited by examiner]
US 20200117836A1 · Garbe · 2020 [cited by examiner]
US 20200249264A1 · Briano · 2020 [cited by examiner]
US 20230137364A1 · Best · 2023 [cited by examiner]
US 20230222251A1 · Pelissier · 2023 [cited by examiner]
Cadence, “A Method to Measure Die Pad Capacitance,” p. 1, Oct. 24, 2018, as downloaded from https://semiengineering.com/a-method-to-measure-die-pad-capacitance/. [cited by applicant]
Takuji et al., “Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices,” IEEE Journal of Solid-State Circuits, vol. 55, No. 10, pp. 1-9, Oct. 2020. [cited by applicant]
Nemiroff et al., “Fault-Injection Countermeasures, Deployed at Scale,” White Paper, Intel Corporation, pp. 1-6, Aug. 2022. [cited by applicant]