Electronic device with enhancement mode gallium nitride transistor, and method of making same
Fabrication methods, electronic devices and enhancement mode gallium nitride transistors include a gallium nitride interlayer between a hetero-epitaxy structure and a p-doped gallium nitride layer and/or between the p-doped gallium nitride layer and a gate structure to mitigate p-type dopant diffusion, improve current collapse performance, and mitigate positive-bias temperature instability. In certain examples, the interlayer or interlayers is/are fabricated using epitaxial deposition with no p-type dopant source. In certain fabrication process examples, epitaxial deposition or growth is interrupted after the depositing an aluminum gallium nitride layer of the hetero-epitaxy structure, after which growth is resumed to deposit the first gallium nitride interlayer over the aluminum gallium nitride layer to mitigate p-type dopant diffusion and current collapse.
1 . An electronic device, comprising:
a substrate;
a buffer structure over the substrate;
a first gallium nitride layer over the buffer structure;
an aluminum gallium nitride layer on the first gallium nitride layer;
a gate structure having a second gallium nitride layer, a third gallium nitride layer, and a gate contact, wherein:
the second gallium nitride layer is directly on the aluminum gallium nitride layer;
the third gallium nitride layer is directly on the second gallium nitride layer; and
the gate contact is over the third gallium nitride layer;
a drain contact spaced apart from the gate contact; and
a source contact spaced apart from the gate contact and from the drain contact;
wherein the second gallium nitride layer has a first peak p-type dopant concentration less than 1×10 17 atoms/cm 3 ; and
wherein the third gallium nitride layer has a second peak p-type dopant concentration that is more than 10 times greater than the first peak p-type dopant concentration.
2 . The electronic device of claim 1 , wherein the second gallium nitride layer has a thickness of 50 nm or less.
3 . The electronic device of claim 1 , wherein the second gallium nitride layer has a thickness of 10-20 nm.
4 . The electronic device of claim 1 , wherein the third gallium nitride layer is doped with magnesium (Mg).
5 . The electronic device of claim 1 , further including:
a first aluminum nitride layer disposed between the first gallium nitride layer and the aluminum gallium nitride layer;
a second aluminum nitride layer disposed over the substrate; and
a second aluminum gallium nitride layer disposed over the second aluminum nitride layer.
6 . The electronic device of claim 1 , wherein the gate contact is directly on the third gallium nitride layer.
7 . The electronic device of claim 1 , further including:
a fourth gallium nitride layer on the third gallium nitride layer, the fourth gallium nitride layer having a third peak p-type dopant concentration that is less than 0.1 times the second peak p-type dopant concentration, wherein the gate contact is directly on the fourth gallium nitride layer.
8 . An electronic device, comprising:
a substrate;
a buffer structure over the substrate;
a first gallium nitride layer over the buffer structure;
an aluminum gallium nitride layer on the first gallium nitride layer;
a gate structure having a second gallium nitride layer, a third gallium nitride layer, and a gate contact, wherein:
the second gallium nitride layer is directly on the aluminum gallium nitride layer;
the third gallium nitride layer is directly on the second gallium nitride layer; and
the gate contact is directly on the third gallium nitride layer;
a drain contact spaced apart from the gate contact; and
a source contact spaced apart from the gate contact and from the drain contact;
wherein the third gallium nitride layer has a first peak p-type dopant concentration less than 1×10 17 atoms/cm 3 ; and
wherein the second gallium nitride layer has a second peak p-type dopant concentration that is more than 10 times greater than the first peak p-type dopant concentration.
9 . The electronic device of claim 8 , wherein the third gallium nitride layer has a thickness of 50 nm or less.
10 . The electronic device of claim 8 , wherein the third gallium nitride layer has a thickness of 10-20 nm.
11 . The electronic device of claim 8 , wherein the second gallium nitride layer is doped with magnesium (Mg).
12 . The electronic device of claim 8 , further including:
a first aluminum nitride layer disposed between the first gallium nitride layer and the aluminum gallium nitride layer;
a second aluminum nitride layer disposed over the substrate; and
a second aluminum gallium nitride layer disposed over the second aluminum nitride layer.
13 . The electronic device of claim 1 , wherein the gate contact includes aluminum or copper.
14 . The electronic device of claim 8 , wherein the gate contact includes aluminum or copper.
15 . The electronic device of claim 1 , wherein p-type dopants of the second gallium nitride layer and the third gallium nitride layer include magnesium (Mg).
16 . The electronic device of claim 8 , wherein p-type dopants of the second gallium nitride layer and the third gallium nitride layer include magnesium (Mg).
17 . The electronic device of claim 1 , wherein the buffer structure includes:
a first sublayer of a first thickness and a first aluminum concentration;
a second sublayer of a second thickness and a second aluminum concentration contacting and overlaying the first sublayer, wherein the second thickness is greater than the first thickness, and wherein the second aluminum concentration is less than the first aluminum concentration; and
a third sublayer of a third thickness and a third aluminum concentration contacting and overlaying the second sublayer, wherein the third thickness is greater than the second thickness, and wherein the third aluminum concentration is less than the second aluminum concentration.
18 . The electronic device of claim 1 , wherein:
a bottom surface of the drain contact is disposed within the aluminum gallium nitride layer; and
a bottom surface of the source contact is disposed within the aluminum gallium nitride layer.
19 . The electronic device of claim 8 , wherein the buffer structure includes:
a first sublayer of a first thickness and a first aluminum concentration;
a second sublayer of a second thickness and a second aluminum concentration contacting and overlaying the first sublayer, wherein the second thickness is greater than the first thickness, and wherein the second aluminum concentration is less than the first aluminum concentration; and
a third sublayer of a third thickness and a third aluminum concentration contacting and overlaying the second sublayer, wherein the third thickness is greater than the second thickness, and wherein the third aluminum concentration is less than the second aluminum concentration.
20 . The electronic device of claim 8 , wherein:
a bottom surface of the drain contact is disposed within the aluminum gallium nitride layer; and
a bottom surface of the source contact is disposed within the aluminum gallium nitride layer.