Capacitance reduction for backside power rail device
The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.
1 . A semiconductor device, comprising:
an epitaxial structure;
a dielectric structure on a first side of the epitaxial structure;
an air gap between the epitaxial structure and the dielectric structure, wherein the air gap is in contact with the dielectric structure; and
a contact structure in contact with a second side of the epitaxial structure, wherein the second side is opposite to the first side.
2 . The semiconductor device of claim 1 , wherein the air gap is in contact with the first side of the epitaxial structure.
3 . The semiconductor device of claim 1 , further comprising a silicide layer on the first side of the epitaxial structure, wherein the silicide layer is between the air gap and the epitaxial structure.
4 . The semiconductor device of claim 3 , further comprising a layer of dielectric material in contact with the silicide layer, wherein the air gap is between the layer of dielectric material and the dielectric structure.
5 . The semiconductor device of claim 1 , further comprising a seal structure on the first side of the epitaxial structure, wherein the seal structure, the dielectric structure, and the epitaxial structure enclose the air gap.
6 . The semiconductor device of claim 1 , further comprising an interconnect structure on the second side of the epitaxial structure and in contact with the contact structure.
7 . The semiconductor device of claim 1 , wherein the contact structure comprises a silicide layer.
8 . A semiconductor device, comprising:
first and second source/drain (S/D) regions in contact with opposite ends of a channel structure;
a first contact structure in contact with the first S/D region;
a capping structure above the second S/D region;
an air gap between the capping structure and the second S/D region;
a dielectric structure above the air gap and extending through the capping structure, wherein the air gap is in contact with bottom surfaces of the dielectric structure and the capping structure; and
a second contact structure in contact with the second S/D region and on a side of the second S/D region vertically opposite to the air gap.
9 . The semiconductor device of claim 8 , further comprising a silicide layer on the second S/D region and in contact with the air gap.
10 . The semiconductor device of claim 8 , wherein the dielectric structure, the capping structure, and the second S/D region enclose the air gap.
11 . The semiconductor device of claim 8 , further comprising a seal dielectric layer, wherein the seal dielectric layer is on the second S/D region.
12 . The semiconductor device of claim 8 , wherein the air gap is in contact with the second S/D region.
13 . The semiconductor device of claim 8 , wherein the second contact structure comprises a silicide layer in contact with the second S/D region.
14 . The semiconductor device of claim 8 , further comprising:
a first interconnect structure in contact with the first contact structure; and
a second interconnect structure in contact with the second contact structure.
15 . A method, comprising:
forming a source/drain (S/D) region on a substrate;
forming a contact structure on the S/D region;
forming a dielectric structure on the contact structure; and
removing at least a portion of the contact structure through the dielectric structure to form an air gap between the dielectric structure and the S/D region.
16 . The method of claim 15 , wherein the removing at least the portion of the contact structure comprises:
forming an opening in the dielectric structure;
removing the contact structure through the opening to form the air gap; and
forming a seal structure in the opening to seal the air gap.
17 . The method of claim 16 , wherein the forming the seal structure comprises depositing a dielectric material on the dielectric structure to seal the opening.
18 . The method of claim 15 , wherein the contact structure comprises a metal contact and a silicide layer, and wherein the removing at least the portion of the contact structure comprises:
forming an opening in the dielectric structure;
removing the metal contact through the opening to form the air gap; and
forming a seal structure in the opening to seal the air gap, wherein the air gap is in contact with the silicide layer.
19 . The method of claim 15 , further comprising:
removing a portion of the S/D region on a side of the S/D region opposite to the air gap; and
forming an additional contact structure in contact with the side of the S/D region opposite to the air gap.
20 . The method of claim 19 , further comprising forming an interconnect structure in contact with the additional contact structure.