Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes forming an active pattern on a substrate, forming sacrificial and semiconductor layers alternately stacked on the active pattern, forming a dummy gate and first source/drain trench on one side of the dummy gate by etching the stacked structure, forming a second source/drain trench on the active pattern by etching a sidewall of the sacrificial layer exposed to the first source/drain trench, forming a first inner spacer material layer along sidewall and bottom surfaces of the second source/drain trench, forming a second inner spacer material layer by anisotropic etching a first inner spacer material layer, and forming a third source/drain trench on the active pattern by isotropic etching.
1 . A method for fabricating a semiconductor device, the method comprising:
forming an active pattern extending in a first horizontal direction on a substrate, and forming a stacked structure in which a sacrificial layer and a semiconductor layer are alternately stacked on the active pattern, the stacked structure extending in the first horizontal direction;
forming a dummy gate on the active pattern, the dummy gate extending in a second horizontal direction different from the first horizontal;
forming a first source/drain trench on at least one side of the dummy gate on the active pattern by etching the stacked structure, a remaining semiconductor layer being defined as a plurality of nanosheets;
forming a second source/drain trench on the active pattern by etching a portion of a sidewall of the sacrificial layer exposed to the first source/drain trench;
forming a first inner spacer material layer along a sidewall and a bottom surface of the second source/drain trench;
forming a second inner spacer material layer by etching a portion of the first inner spacer material layer exposed by performing a first etching process, the first etching process being is an anisotropic etching process, and at least a portion of the second inner spacer material layer remaining on sidewalls of the nanosheets and the active pattern after the first etching process is performed;
forming a third source/drain trench on the active pattern by etching the second inner spacer material layer by performing a second etching process the second etching process being is an isotropic etching process, an upper surface of the active pattern and the sidewalls of the plurality of nanosheets being exposed by the third source/drain trench, and the second inner spacer material layer remaining between the plurality of nanosheets being defined as an inner spacer; and
forming a source/drain region inside the third source/drain trench.
2 . The method as claimed in claim 1 , wherein:
a portion of the first inner spacer material layer etched on the sidewalls of the plurality of nanosheets by the first etching process is defined as a first etched portion, and another portion of the first inner spacer material layer etched on the active pattern by the first etching process being defined as a second etched portion, and
a first etched thickness of the first etched portion in the first horizontal direction is less than a second etched thickness of the second etched portion in a vertical direction.
3 . The method as claimed in claim 1 , wherein:
the first etching process is a dry etching process, and
the second etching process is a wet etching process.
4 . The method as claimed in claim 1 , wherein each of the first inner spacer material layer and the second inner spacer material layer is in contact with the sacrificial layer.
5 . The method as claimed in claim 1 , wherein after the first etching process is performed, at least a portion of the second inner spacer material layer remains on an upper surface of the dummy gate.
6 . The method as claimed in claim 1 , wherein after the first etching process is performed, a thickness of the second inner spacer material layer remaining on the sidewalls of the plurality of nanosheets in the first horizontal direction is greater than a thickness of the second inner spacer material layer remaining on the active pattern in a vertical direction.
7 . The method as claimed in claim 1 , wherein after the first etching process is performed, a thickness of the second inner spacer material layer remaining on the sidewalls of the plurality of nanosheets in the first horizontal direction is smaller than a thickness of the second inner spacer material layer remaining on the active pattern in a vertical direction.
8 . The method as claimed in claim 1 , wherein the forming of the first inner spacer material layer includes:
forming a first material layer along the sidewall and the bottom surface of the second source/drain trench; and
forming a second material layer including a material different from the first material layer on the first material layer.
9 . The method as claimed in claim 8 , wherein:
after the first etching process is performed, at least a portion of the second material layer remains on the sidewalls of the plurality of nanosheets, and
the first material layer is exposed on the active pattern.
10 . The method as claimed in claim 8 , wherein after the first etching process is performed, the first material layer is exposed on each of the sidewalls of the plurality of nanosheets and the active pattern.
11 . The method as claimed in claim 1 , further comprising, after the forming of the source/drain region,
forming an interlayer insulating layer covering the source/drain region on an upper surface of the substrate; and
forming a source/drain contact penetrating through the interlayer insulating layer in a vertical direction and connected to the source/drain region.
12 . The method as claimed in claim 1 , further comprising, after the forming of the source/drain region:
forming an interlayer insulating layer covering the source/drain region on an upper surface of the substrate; and
forming a source/drain contact penetrating through the substrate and the active pattern in a vertical direction and connected to the source/drain region.
13 . The method as claimed in claim 1 , further comprising, after the forming of the source/drain region:
forming an interlayer insulating layer covering the source/drain region on an upper surface of the substrate;
removing the dummy gate and the sacrificial layer; and
sequentially forming a gate insulating layer and a gate electrode in a portion which the dummy gate and the sacrificial layer are removed.
14 . A method for fabricating a semiconductor device, the method comprising:
forming an active pattern extending in a first horizontal direction on a substrate,
forming a stacked structure in which a sacrificial layer and a semiconductor layer are alternately stacked on the active pattern, the stacked structure extending in the first horizontal direction;
forming a dummy gate extending in a second horizontal direction different from the first horizontal direction on the active pattern;
forming a first source/drain trench on at least one side of the dummy gate on the active pattern by etching the stacked structure, a remaining semiconductor layer being defined as a plurality of nanosheets;
forming a second source/drain trench on the active pattern by etching a portion of a sidewall of the sacrificial layer exposed to the first source/drain trench;
forming a first inner spacer material layer along a sidewall and a bottom surface of the second source/drain trench;
forming a second inner spacer material layer by etching a portion of exposed the first inner spacer material layer by performing a first etching process, which is a dry etching process, at least a portion of the second inner spacer material layer remaining on sidewalls of the nanosheets and the active pattern after the first etching process is performed;
forming a third source/drain trench on the active pattern by etching the second inner spacer material layer by performing a second etching process, which is a wet etching process, an upper surface of the active pattern and the sidewalls of the plurality of nanosheets being exposed by the third source/drain trench, and the second inner spacer material layer remaining between the plurality of nanosheets being defined as an inner spacer; and
forming a source/drain region inside the third source/drain trench,
wherein a portion of the first inner spacer material layer etched on the sidewalls of the plurality of nanosheets by the first etching process is defined as a first etched portion, and another portion of the first inner spacer material layer etched on the active pattern by the first etching process is defined as a second etched portion, and
wherein a first etched thickness of the first etched portion in the first horizontal direction is smaller than a second etched thickness of the second etched portion in a vertical direction.
15 . The method as claimed in claim 14 , wherein the first etching process is an anisotropic dry etching process, and the second etching process is an isotropic wet etching process.
16 . The method as claimed in claim 14 , wherein each of the first inner spacer material layer and the second inner spacer material layer is in contact with the sacrificial layer.
17 . The method as claimed in claim 14 , wherein after the first etching process is performed, a thickness of the second inner spacer material layer remaining on the sidewalls of the plurality of nanosheets in the first horizontal direction is greater than a thickness of the second inner spacer material layer remaining on the active pattern in the vertical direction.
18 . The method as claimed in claim 14 , wherein the forming of the first inner spacer material layer includes:
forming a first material layer along the sidewall and the bottom surface of the second source/drain trench; and
forming a second material layer including a material different from the first material layer on the first material layer.
19 . The method as claimed in claim 14 , further comprising, before the forming of the first source/drain trench, forming a gate spacer extending in the second horizontal direction on a sidewall of the dummy gate in the first horizontal direction,
wherein the first inner spacer material layer is formed on a sidewall of the gate spacer.
20 . A method for fabricating a semiconductor device, the method comprising:
forming an active pattern extending in a first horizontal direction on a substrate, forming a stacked structure in which a sacrificial layer and a semiconductor layer are alternately stacked on the active pattern, the stacked structure extending in the first horizontal direction;
forming a dummy gate extending in a second horizontal direction different from the first horizontal direction on the active pattern;
forming a first source/drain trench on at least one side of the dummy gate on the active pattern by etching the stacked structure, a remaining semiconductor layer being defined as a plurality of nanosheets;
forming a second source/drain trench on the active pattern by etching a portion of a sidewall of the sacrificial layer exposed to the first source/drain trench;
forming a first inner spacer material layer along a sidewall and a bottom surface of the second source/drain trench;
forming a second inner spacer material layer by etching a portion of exposed the first inner spacer material layer by performing a first etching process, which is an anisotropic dry etching process, at least a portion of the second inner spacer material layer remaining on sidewalls of the nanosheets and the active pattern after the first etching process is performed;
forming a third source/drain trench on the active pattern by etching the second inner spacer material layer by performing a second etching process, which is an isotropic wet etching process, an upper surface of the active pattern and the sidewalls of the plurality of nanosheets being exposed by the third source/drain trench, and the second inner spacer material layer remaining between the plurality of nanosheets being defined as an inner spacer; and forming a source/drain region inside the third source/drain trench, wherein:
each of the first inner spacer material layer and the second inner spacer material layer is in contact with the sacrificial layer,
a portion of the first inner spacer material layer etched on the sidewalls of the plurality of nanosheets by the first etching process is defined as a first etched portion, and another portion of the first inner spacer material layer etched on the active pattern by the first etching process is defined as a second etched portion,
a first etched thickness of the first etched portion in the first horizontal direction is smaller than a second etched thickness of the second etched portion in a vertical direction, and
after the first etching process is performed, a thickness of the second inner spacer material layer remaining on the sidewalls of the plurality of nanosheets in the first horizontal direction is greater than a thickness of the second inner spacer material layer remaining on the active pattern in the vertical direction.