Isolation structure for source/drain of semiconductor device
The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, an insulating stack formed over the substrate, a vertical structure formed through the insulating stack, a source/drain region formed over the vertical structure, and an isolation structure formed adjacent to the source/drain region and protruding the insulating stack. The source/drain region can include a first side surface and a second side surface. A lateral separation between the first side surface and the vertical structure can be greater than an other lateral separation between the second side surface and the vertical structure.
1 . A semiconductor structure, comprising:
a substrate;
an insulating stack formed over the substrate;
a vertical structure formed through the insulating stack;
a source/drain region extending laterally outward from the vertical structure, the source/drain region comprising a first side surface and a second side surface, wherein a lateral separation between the first side surface and the vertical structure is greater than a lateral separation between the second side surface and the vertical structure;
a gate structure over the vertical structure and adjacent to the source/drain region; and
an isolation structure extending parallel to the vertical structure, wherein the isolation structure comprises:
a first portion in contact with the second side surface, wherein the first portion comprises an upper portion, a middle portion, and a lower portion, and wherein a width of the middle portion is greater than widths of the upper and lower portions; and
a second portion adjacent to the gate structure, wherein a first height of the first portion is less than a second height of the second portion.
2 . The semiconductor structure of claim 1 , wherein the first side surface comprises a convex surface and the second side surface comprises a concave surface.
3 . The semiconductor structure of claim 1 , wherein the first side surface comprises a convex surface and the second side surface comprises a shoulder structure.
4 . The semiconductor structure of claim 1 , further comprising a metal contact formed over a top surface of the source/drain region.
5 . The semiconductor structure of claim 1 , wherein a curved interface between the first portion and the source/drain region is above a slanted side surface of the first portion.
6 . The semiconductor structure of claim 1 , wherein the first portion further comprises a bottom portion below the lower portion, and wherein a width of the bottom portion is less than the width of the lower portion.
7 . A structure, comprising:
a fin structure on a substrate;
a source/drain (S/D) region over top and side surfaces of a top portion of the fin structure, wherein the S/D region comprises first and second portions on first and second sides of the fin structure, respectively, wherein the second portion comprises an upper portion and a lower portion, wherein a width of the upper portion is less than a width of the lower portion, wherein a curved surface of the second portion comprises a concave portion, and wherein a width of the first portion is greater than a width of the second portion; and
an isolation structure protruding into the concave portion, wherein the isolation structure is in contact with the upper portion and isolated from the lower portion.
8 . The structure of claim 7 , wherein the second portion comprises a shoulder structure.
9 . The structure of claim 7 , further comprising an interlayer dielectric layer between the lower portion and the isolation structure.
10 . The structure of claim 7 , further comprising an etch stop layer on the lower portion and the isolation structure.
11 . The structure of claim 7 , further comprising a gate structure over the fin structure and in contact with the isolation structure, wherein an interface between the isolation structure and the gate structure is substantially flat.
12 . The structure of claim 7 , wherein the isolation structure comprises an upper section having a convex surface and a lower section having a slanted surface.
13 . The structure of claim 7 , further comprising an etch stop layer below the lower portion, wherein the isolation structure comprises a portion directly above the etch stop layer.
14 . A structure, comprising:
a shallow trench isolation (STI) region on a substrate;
first and second fin structures through the STI region;
first and second source/drain (S/D) structures on the first and second fin structures, respectively;
first and second gate structures over the first and second fin structures, respectively; and
an isolation structure between the first and second fin structures and in contact with concave surfaces of the first and second S/D structures, wherein the isolation structure comprises:
a first portion between and protruding horizontally into the first and second S/D structures, wherein a first bottom surface of the first portion is below the first and second S/D structures; and
a second portion between the first and second gate structures, wherein a second bottom surface of the second portion is below the first bottom surface.
15 . The structure of claim 14 , wherein the first S/D structure is asymmetric with respect to a vertical line bisecting the first fin structure.
16 . The structure of claim 14 , further comprising an interlayer dielectric layer between the first S/D region and the isolation structure and between the second S/D region and the isolation structure.
17 . The structure of claim 14 , wherein each of the first and second S/D structures comprises a shoulder structure in contact with the isolation structure.
18 . The semiconductor structure of claim 1 , wherein:
a bottom surface of the first portion is above the substrate; and
the second portion protrudes into the substrate.
19 . The structure of claim 14 , wherein the first portion comprises an upper portion and a lower portion in contact with the first S/D structure, and wherein a width of the lower portion is greater than a width of the upper portion.
20 . The structure of claim 14 , wherein the second portion comprises an upper portion in the STI region and a lower portion in the substrate, and wherein a width of the upper portion is greater than a width of the lower portion.