Imaging device and electronic apparatus
An imaging device including: a first semiconductor substrate; a second semiconductor substrate; and a wiring layer. The first semiconductor substrate has a first surface and a second surface and includes a sensor pixel. The second semiconductor substrate has a third surface and a fourth surface and includes a readout circuit that outputs a pixel signal based on an output from the sensor pixel. The second semiconductor substrate is stacked on the first semiconductor substrate with the first surface and the fourth surface opposed to each other. The wiring layer is between the first semiconductor substrate and the second semiconductor substrate and includes a first wiring line and a second wiring line that are electrically coupled to each other. One of the first wiring line and the second wiring line is in an electrically floating state while the other is electrically coupled to a transistor.
1 . An imaging device, comprising:
a first substrate, including:
a sensor pixel that performs photoelectric conversion, wherein the sensor pixel includes a floating diffusion;
a second substrate, including:
a first transistor, wherein the first transistor is one of a plurality of transistors that are included in a readout circuit, and wherein the second substrate is stacked on the first substrate; and
an additional capacitance, wherein the additional capacitance is electrically connected to the first transistor, wherein the additional capacitance overlaps with at least a part of the sensor pixel.
2 . The imaging device according to claim 1 , wherein the readout circuit includes an efficiency switching transistor, and wherein the additional capacitance is electrically connected to the efficiency switching transistor.
3 . The imaging device according to claim 1 , wherein the second substrate includes a wiring layer.
4 . The imaging device according to claim 3 , wherein the additional capacitance is included in the wiring layer of the first substrate.
5 . The imaging device according to claim 4 , wherein the additional capacitance is formed by two wirings in the wiring layer.
6 . The imaging device according to claim 4 , the second substrate further including an n-type semiconductor region, wherein the additional capacitance is coupled to the n-type semiconductor region.
7 . The imaging device according to claim 6 , wherein the readout circuit includes an efficiency switching transistor, and wherein the n-type semiconductor region serves as a drain of the efficiency switching transistor.
8 . The imaging device according to claim 3 , wherein the first substrate includes a wiring layer.
9 . The imaging device according to claim 8 , wherein a first wiring line of the additional capacitance is included in the wiring layer of the first substrate, and wherein a second wiring line of the additional capacitance is included in the wiring layer of the second substrate.
10 . The imaging device according to claim 9 , wherein the first wiring line is coupled to a pad electrode of the first substrate, wherein the second wiring line is coupled to a pad electrode of the second substrate, and wherein the pad electrode of the first substrate is joined to the pad electrode of the second substrate.
11 . The imaging device according to claim 10 the second substrate further including an n-type semiconductor region, wherein the readout circuit includes an efficiency switching transistor, and wherein the additional capacitance is coupled to the n-type semiconductor region.
12 . The imaging device according to claim 11 , wherein the n-type semiconductor region serves as a drain of the efficiency switching transistor.
13 . An imaging device, comprising:
a first substrate, including:
a sensor pixel that performs photoelectric conversion, wherein the sensor pixel includes a floating diffusion;
a second substrate, including:
a first transistor, wherein the first transistor is one of a plurality of transistors that are included in a readout circuit, and wherein the second substrate is stacked on the first substrate; and
an additional capacitance, wherein the additional capacitance is electrically connected to the first transistor, wherein the readout circuit includes an efficiency switching transistor, and wherein the additional capacitance is electrically connected to the efficiency switching transistor.
14 . The imaging device according to claim 13 , wherein the additional capacitance overlaps with at least a part of the sensor pixel.
15 . An imaging device, comprising:
a first substrate, including:
a sensor pixel that performs photoelectric conversion, wherein the sensor pixel includes a floating diffusion; and
a wiring layer;
a second substrate, including:
a first transistor, wherein the first transistor is one of a plurality of transistors that are included in a readout circuit, and wherein the second substrate is stacked on the first substrate; and
a wiring layer; and
an additional capacitance, wherein the additional capacitance is electrically connected to the first transistor, and wherein the additional capacitance is included in the wiring layer of the second substrate.
16 . The imaging device according to claim 15 , wherein the additional capacitance is formed by two wirings in the wiring layer.
17 . The imaging device according to claim 15 , the second substrate further including an n-type semiconductor region, wherein the additional capacitance is coupled to the n-type semiconductor region.
18 . The imaging device according to claim 17 , wherein the readout circuit includes an efficiency switching transistor, and wherein the n-type semiconductor region serves as a drain of the efficiency switching transistor.
19 . An imaging device, comprising:
a first substrate, including:
a sensor pixel that performs photoelectric conversion, wherein the sensor pixel includes a floating diffusion; and
a wiring layer;
a second substrate, including:
a first transistor, wherein the first transistor is one of a plurality of transistors that are included in a readout circuit, and wherein the second substrate is stacked on the first substrate; and
a wiring layer; and
an additional capacitance, wherein the additional capacitance is electrically connected to the first transistor, wherein a first wiring line of the additional capacitance is included in the wiring layer of the first substrate, and wherein a second wiring line of the additional capacitance is included in the wiring layer of the second substrate.
20 . The imaging device according to claim 19 , wherein the first wiring line is coupled to a pad electrode of the first substrate, wherein the second wiring line is coupled to a pad electrode of the second substrate, and wherein the pad electrode of the first substrate is joined to the pad electrode of the second substrate.