Method for manufacturing semiconductor structure with thin film transistor
Semiconductor structures and methods for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a bottom electrode layer over a substrate and forming a gate dielectric layer over the bottom electrode layer. The method for manufacturing the semiconductor structure also includes forming an active layer over the gate dielectric layer and forming an indium-containing feature vertically overlapping the bottom electrode layer. The method for manufacturing the semiconductor structure also includes forming a source/drain contact landing on the indium-containing feature.
1 . A method for manufacturing a semiconductor structure, comprising:
forming a bottom electrode layer over a substrate;
forming a gate dielectric layer over the bottom electrode layer;
forming an active layer over the gate dielectric layer;
forming an indium-containing feature vertically overlapping the bottom electrode layer; and
forming a source/drain contact landing on the indium-containing feature, wherein the source/drain contact comprises a hydrogen-absorbing layer and a contact material layer surrounded by the hydrogen-absorbing layer, and a portion of the hydrogen-absorbing layer vertically sandwiched between the contact material layer and the indium-containing feature and interfacing the indium-containing feature,
wherein four sidewalls of the source/drain contact are surrounded by the active layer in a top view.
2 . The method for manufacturing the semiconductor structure as claimed in claim 1 , further comprising:
forming a dielectric layer over the active layer; and
patterning the dielectric layer to form a trench partially exposing the active layer,
wherein the indium-containing feature is formed in a bottom portion of the trench.
3 . The method for manufacturing the semiconductor structure as claimed in claim 2 , wherein the trench comprises an extending portion at least partially extends into the active layer, and the extending portion of the trench is no wider than a width of a top portion of the trench.
4 . The method for manufacturing the semiconductor structure as claimed in claim 3 , wherein a top surface of the indium-containing feature is higher than a top surface of the active layer.
5 . The method for manufacturing the semiconductor structure as claimed in claim 4 , wherein a bottom surface of the indium-containing feature is higher than a bottom surface of the active layer.
6 . The method for manufacturing the semiconductor structure as claimed in claim 3 , wherein a top surface of the indium-containing feature is no higher than a top surface of the active layer.
7 . The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein forming the indium-containing feature comprises
implanting indium dopants in the active layer.
8 . The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein there is an interface between the hydrogen-absorbing layer and the indium-containing feature.
9 . The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein the active layer has a first projection area in a top view, the source/drain contact has a second projection area in the top view, and the second projection area is completely inside the first projection area in the top view.
10 . The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein the four sidewalls of the source/drain contact are spaced apart from four sidewalls of the active layer in the top view.
11 . A method for manufacturing a semiconductor structure, comprising:
forming an interconnect structure over a substrate;
forming a bottom electrode layer over the interconnect structure;
forming an active layer over the bottom electrode layer;
forming a first indium-containing feature and a second indium-containing feature in direct contact with the active layer, wherein a width of the first indium-containing feature is smaller than a width of the active layer in a first direction; and
forming a first source/drain contact over the first indium-containing feature and a second source/drain contact over the second indium-containing feature, wherein the first source/drain contact comprises:
a first sidewall; and
a second sidewall opposite to the first sidewall and facing the second source/drain contact in a cross-sectional view, and
wherein the second source/drain contact comprises:
a third sidewall; and
a fourth sidewall opposite to the third sidewall and facing the first source/drain contact in the cross-sectional view,
wherein a width of the first indium-containing feature is no smaller than a width of the first source/drain contact in the first direction, and
wherein the bottom electrode layer continuously extends under the first source/drain contact and the second source/drain contact and laterally protrudes outside the first sidewall and the second sidewall of the first source/drain contact and the third sidewall and the fourth sidewall of the second source/drain contact in the cross-sectional view.
12 . The method for manufacturing the semiconductor structure as claimed in claim 11 , further comprising:
forming an indium-containing layer over the active layer; and
pattering the indium-containing layer to form the first indium-containing feature and the second indium-containing feature.
13 . The method for manufacturing the semiconductor structure as claimed in claim 12 , wherein the width of the first indium-containing feature is greater than the width of the first source/drain contact in the first direction.
14 . The method for manufacturing the semiconductor structure as claimed in claim 11 , further comprising:
forming a dielectric layer covering the first indium-containing feature; and
patterning the dielectric layer to expose the first indium-containing feature.
15 . The method for manufacturing the semiconductor structure as claimed in claim 14 , wherein a first portion of a top surface of the first indium-containing feature is covered by the dielectric layer and a second portion of the top surface of the first indium-containing feature is covered by the first source/drain contact.
16 . The method for manufacturing the semiconductor structure as claimed in claim 11 , further comprising:
forming a dielectric layer over the active layer, wherein the first source/drain contact is formed through the dielectric layer; and
forming a top gate structure through the dielectric layer over the active layer.
17 . The method for manufacturing the semiconductor structure as claimed in claim 11 , wherein a first edge of the first source/drain contact and a second edge of the second source/drain contact are inside a projection area of the active layer without overlapping an edge of the active layer in a top view.
18 . A method for manufacturing a semiconductor structure, comprising:
forming an interconnect structure over a substrate;
forming a gate dielectric layer over the interconnect structure;
forming an oxide semiconductor layer over the gate dielectric layer;
forming a dielectric layer covering the oxide semiconductor layer;
forming a trench that extends through the dielectric layer and into the oxide semiconductor layer to a first level, wherein the trench has a first sidewall that continuously and smoothly extends from a top surface of the dielectric layer to the first level, and the first level is lower than a top surface of the oxide semiconductor layer;
forming an indium-containing feature in a bottom portion of the trench, wherein the indium-containing feature covers a lower portion of the first sidewall of the trench; and
forming a source/drain contact over the indium-containing feature in the trench, wherein the source/drain contact covers an upper portion of the first sidewall of the trench, and an interface between the source/drain contact and the dielectric layer is substantially aligned with an interface between the indium-containing feature and the oxide semiconductor layer,
wherein the source/drain contact is in direct contact with a top surface of the indium-containing feature.
19 . The method for manufacturing the semiconductor structure as claimed in claim 18 , wherein the indium-containing feature is formed without vertically overlapping the dielectric layer.
20 . The method for manufacturing the semiconductor structure as claimed in claim 18 , wherein a top surface of the indium-containing feature is substantially level with a top surface of the oxide semiconductor layer.