Method of manufacturing a semiconductor device with multi-layer gate spacers
Semiconductor devices and methods of manufacture are presented in which spacers are manufactured on sidewalls of gates for semiconductor devices. In embodiments the spacers comprise a first seal, a second seal, and a contact etch stop layer, in which the first seal comprises a first shell along with a first bulk material, the second seal comprises a second shell along with a second bulk material, and the contact etch stop layer comprises a third bulk material and a second dielectric material.
1 . A method of manufacturing a semiconductor device, the method comprising:
forming a first spacer layer comprising an inner layer disposed between two outer layers, wherein the inner layer and the two outer layers each comprise a first material, wherein a carbon content of the two outer layers is greater than that of the inner layer, and an oxygen content of the two outer layers is less than that of the inner layer; and
forming a second spacer layer comprising a first layer and a second layer, the first layer being the first material and being in direct contact with one of the two outer layers.
2 . The method of claim 1 , wherein the first material comprises SiOCN.
3 . The method of claim 1 , wherein the second layer comprises silicon nitride.
4 . The method of claim 1 , wherein the forming the first spacer layer comprises:
forming a first one of the two outer layers by sequentially introducing a first set of precursors for a first set of exposure times; and
forming the inner layer by sequentially introducing the first set of precursors for a second set of exposure times less than the first set of exposure times.
5 . The method of claim 4 , wherein the first set of precursors comprises hexachlorodisilane, propane, ammonia and oxygen.
6 . The method of claim 4 , wherein the introducing the first set of precursors is repeated until the first one of the two outer layers has a thickness of between about 0.2 nm and about 1 nm.
7 . The method of claim 1 , further comprising implanting dopants into a semiconductor fin between the forming the first spacer layer and the forming the second spacer layer.
8 . A method of manufacturing a semiconductor device, the method comprising:
depositing a first shell of a first material with a first composition;
depositing a first bulk material of the first material with a second composition different from the first composition;
depositing a second bulk material of the first material with a third composition;
depositing a second shell of the first material with a fourth composition different from the third composition;
depositing a third bulk material of the first material with a fifth composition; and
depositing a third shell of a second material different from the first material.
9 . The method of claim 8 , wherein the first material comprises silicon carbon oxynitride.
10 . The method of claim 8 , wherein the depositing the first shell pulses oxygen for a first time period and the depositing the first bulk material pulses oxygen for second time period larger than the first time period.
11 . The method of claim 10 , wherein the depositing the first shell pulses nitrogen for a first time period and the depositing the first bulk material pulses nitrogen for second time period smaller than the first time period.
12 . The method of claim 11 , wherein the depositing the first shell pulses carbon for a first time period and the depositing the first bulk material pulses carbon for second time period smaller than the first time period.
13 . The method of claim 8 , further comprising forming a lightly doped drain region between the depositing the first shell and the depositing the second shell.
14 . The method of claim 8 , wherein the second material comprises silicon nitride.
15 . A method of manufacturing a semiconductor device, the method comprising:
patterning a dummy gate electrode over a semiconductor fin;
sequentially introducing a first set of precursors to the dummy gate electrode using a first set of exposure times to form a first shell layer;
sequentially introducing the first set of precursors to the dummy gate electrode using a second set of exposure times different from the first set of exposure times to form a first bulk dielectric material;
sequentially introducing the first set of precursors to the dummy gate electrode using a third set of exposure times to form a second bulk dielectric material;
sequentially introducing the first set of precursors to the dummy gate electrode using a fourth set of exposure times to form a second shell layer;
sequentially introducing the first set of precursors to the dummy gate electrode using a fifth set of exposure times to form a third bulk dielectric material; and
depositing a dielectric material after the sequentially introducing the first set of precursors to the dummy gate electrode using the fifth set of exposure times.
16 . The method of claim 15 , wherein the first shell layer is silicon carbon oxynitride.
17 . The method of claim 16 , wherein the dielectric material is silicon nitride.
18 . The method of claim 15 , wherein the sequentially introducing the first set of precursors to the dummy gate electrode using the third set of exposure times occurs after to a formation of a lightly doped source/drain region.
19 . The method of claim 15 , wherein the sequentially introducing the first set of precursors to the dummy gate electrode using the third set of exposure times occurs prior to a formation of a lightly doped source/drain region.
20 . The method of claim 15 , wherein the first shell layer has a higher concentration of nitrogen than the first bulk dielectric material.