Microcontroller with linear memory access in a banked memory
A microcontroller has a data memory divided into a plurality of memory banks, an address multiplexer for providing an address to the data memory, an instruction register providing a first partial address to a first input of the address multiplexer, a bank select register which is not mapped to the data memory for providing a second partial address to a the first input of the address multiplexer, and a plurality of special function registers mapped to the data memory, wherein the plurality of special function registers comprises an indirect access register coupled with a second input of the address multiplexer, and wherein the data memory comprises more than one memory bank of the plurality of memory banks that form a block of linear data memory to which no special function registers are mapped.
1. A microcontroller comprising:
a data memory divided into a plurality of memory banks;
an address multiplexer for providing an address to said data memory, wherein the address multiplexer is configured to only select between a first input and a second input;
an instruction register providing a first partial address to the first input of said address multiplexer;
a bank select register which is not mapped to said data memory for providing a second partial address to said first input of said address multiplexer; and
a plurality of special function registers mapped to more than one bank of said data memory, wherein said plurality of special function registers comprises an indirect access register coupled with the second input of said address multiplexer, and wherein said data memory comprises more than one memory bank of said plurality of memory banks that form a block of linear data memory to which no special function registers are mapped.
2. The microcontroller according to claim 1 , wherein said special function registers comprise a virtual register and wherein a read or write access to said virtual register causes an indirect data memory access using said indirect access register.
3. The microcontroller according to claim 1 , wherein the special function registers comprise registers for performing a programming of a flash memory.
4. The microcontroller according to claim 1 , wherein the special function registers are selected from the group consisting of: a program counter register, a status register, a timer register, a port register, an oscillator calibration register.
5. The microcontroller according to claim 1 , wherein the microcontroller is an 8-bit microcontroller using 12-bit instruction words.
6. The microcontroller according to claim 1 , wherein said data memory comprises n memory banks and m of said n memory banks form said block of linear data memory.
7. The microcontroller according to claim 6 , wherein n=8 and m=4.
8. The microcontroller according to claim 7 , wherein the special function registers are memory mapped to the lower part of all memory banks with the exception of the m memory banks.
9. The microcontroller according to claim 8 , wherein even and odd memory banks of all memory banks with the exception of the m memory banks each contain a different set of memory mapped special function registers.
10. A method for addressing a memory for a microcontroller, wherein the memory is divided into a plurality of memory banks, the method comprising the steps of:
providing access to a plurality of special function registers only via memory mapping, wherein an indirect addressing register is mapped to more than one memory bank;
providing a plurality of memory banks within said memory without register mapping thereby forming a linear memory block;
providing a non-memory mapped bank select register;
providing an address to said memory only by selecting either a first address for direct addressing or a second address for indirect addressing;
wherein for direct addressing, said first address is formed by:
selecting a memory bank by said bank select register, and
addressing said selected memory bank by an address provided by an instruction register;
and wherein for indirect addressing, said second address is formed by:
using an address provided by said memory-mapped indirect addressing register.
11. The method according to claim 10 , wherein indirect addressing is performed by a read or write access to a virtual register.
12. The method according to claim 10 , wherein the special function registers comprise registers for performing a programming of a flash memory.
13. The method according to claim 10 , wherein the special function registers are selected from the group consisting of: a program counter register, a status register, a timer register, a port register, an oscillator calibration register.
14. The method according to claim 10 , wherein the microcontroller is an 8-bit microcontroller using 12-bit instruction words.
15. The method according to claim 10 , wherein said data memory comprises n memory banks and m of said memory banks form said linear memory block.
16. The method according to claim 15 , wherein n=8 and m=4.
17. The method according to claim 15 , comprising the step of memory mapping the special function registers to the lower part of all memory banks with the exception of the m memory banks.
18. The method according to claim 17 , wherein even and odd memory banks all memory banks with the exception of the m memory banks each contain a different set of memory mapped special function registers.
19. A microcontroller comprising:
a data memory divided into a plurality of memory banks, wherein a plurality of memory banks within said memory are free of mapped special function registers thereby forming a linear memory block;
special function registers mapped to said data memory which can be accessed by said microcontroller only via said memory, wherein an indirect addressing register is mapped to more than one memory bank;
a single non-memory mapped bank select register;
wherein the microcontroller is configured to provide an address to said memory only by selecting either a first address for direct addressing or a second address for indirect addressing and wherein to provide said first address for direct addressing, the microcontroller:
selects a memory bank by said bank select register, and
addresses said selected memory bank by an address provided by an instruction register;
and to provide said second address for indirect addressing, the microcontroller:
uses an address provided by said memory-mapped indirect addressing register.
20. The microcontroller according to claim 19 , wherein said data memory comprises eight memory banks, and four of said eight memory banks form said linear memory block.
21. The microcontroller according to claim 20 , wherein the special function registers are memory-mapped to the lower part of all memory banks with the exception of said four memory banks.
22. The microcontroller according to claim 21 , wherein even and odd memory banks of the all memory banks with the exception of said four memory banks each contain a different set of memory mapped special function registers.