Capacitive parametric zero crossing detector device, circuit and method
A capacitive parametric zero crossing detection circuit has a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal.
1. A capacitive parametric zero crossing detection circuit comprising:
a voltage controlled capacitive nonlinear device; and
a resistive element coupled to the nonlinear voltage controlled capacitive device to convert a zero crossing current pulse into a zero crossing voltage signal;
wherein the nonlinear voltage controlled capacitive device is a semiconductor device comprising:
a substrate of a first doping type having a plurality of trenches formed therein;
a poly-Silicon material of a second doping type formed within each of the plurality of trenches; and
metal layers applied to the substrate and the poly-Silicon material to form terminals of the nonlinear voltage controlled capacitive device.
2. The capacitive parametric zero crossing detection circuit of claim 1 further comprising a high-pass filter coupled to the nonlinear voltage controlled capacitive device.
3. The capacitive parametric zero crossing detection circuit of claim 2 wherein the high pass filter comprises:
a capacitive element coupled to the nonlinear voltage controlled capacitive device; and
a resistive element coupled to the capacitive element.
4. The capacitive parametric zero crossing detection circuit of claim 1 , wherein the nonlinear voltage controlled capacitive device comprises:
a pair of diodes; and
a pair of bleed resistors coupled to the pair of diodes.
5. The capacitive parametric zero crossing detection circuit in accordance with claim 1 , wherein the nonlinear voltage controlled capacitive device generates a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
6. The capacitive parametric zero crossing detection circuit of claim 1 , wherein the substrate is an N-type substrate, and the poly-Silicon material is a P-type poly-Silicon material.
7. The capacitive parametric zero crossing detection circuit of claim 1 , wherein the substrate is a P-type substrate, and the poly-Silicon material is an N-type poly-Silicon material.
8. The capacitive parametric zero crossing detection circuit of claim 6 , wherein a junction capacitance of at least one of the trenches changes with a terminal voltage, the junction capacitance having a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
9. The capacitive parametric zero crossing detection circuit of claim 7 , wherein a junction capacitance of at least one of the trenches changes with a terminal voltage, the junction capacitance having a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
10. The capacitive parametric zero crossing detection circuit of claim 6 , wherein the semiconductor device further comprises a common terminal for one of biasing or controlling.
11. The capacitive parametric zero crossing detection circuit of claim 7 , wherein the semiconductor device further comprises a common terminal for one of biasing or controlling.
12. The capacitive parametric zero crossing detection circuit of claim 1 , wherein the nonlinear voltage controlled capacitive device comprises a pair of nonlinear voltage controlled capacitive devices having a common terminal.
13. The capacitive parametric zero crossing detection circuit of claim 1 , wherein the nonlinear voltage controlled capacitive device has a breakdown voltage of at least 130V.
14. A capacitive parametric zero crossing detection circuit comprising:
a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal;
wherein the nonlinear voltage controlled capacitive device is a semiconductor device comprising:
a substrate of a first doping type having a plurality of trenches formed therein;
a poly-Silicon material of a second doping type formed within each of the plurality of trenches; and
metal layers applied to the substrate and the poly-Silicon material to form terminals of the nonlinear voltage controlled capacitive device.
15. The capacitive parametric zero crossing detection circuit of claim 14 , further comprising a first resistive element coupled to an output of the nonlinear voltage controlled capacitive device and to ground.
16. The capacitive parametric zero crossing detection circuit of claim 14 further comprising a high-pass filter coupled to an output of nonlinear voltage controlled capacitive device.
17. The capacitive parametric zero crossing detection circuit of claim 14 , wherein the nonlinear voltage controlled capacitive device comprises:
a pair of diodes; and
a pair of bleed resistors coupled to the pair of diodes.
18. The capacitive parametric zero crossing detection circuit in accordance with claim 14 , wherein the nonlinear voltage controlled capacitive device generates a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
19. The capacitive parametric zero crossing detection circuit of claim 14 , wherein the substrate is an N-type substrate, and the poly-Silicon material is a P-type poly-Silicon material.
20. The capacitive parametric zero crossing detection circuit of claim 14 , wherein the substrate is a P-type substrate, and the poly-Silicon material is an N-type poly-Silicon material.
21. The capacitive parametric zero crossing detection circuit of claim 19 , wherein a notion capacitance of at least one of the trenches changes with a terminal voltage, the junction capacitance having a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
22. The capacitive parametric zero crossing detection circuit of claim 20 , wherein a junction capacitance of at least one of the trenches changes with a terminal voltage, the junction capacitance having a C-V curve in which a capacitance at a near zero voltage is at least 50 times greater than a capacitance at a knee point voltage of the C-V curve.
23. The capacitive parametric zero crossing detection circuit of claim 19 , wherein the semiconductor device further comprises a common terminal for one of biasing or controlling.
24. The capacitive parametric zero crossing detection circuit of claim 20 , wherein the semiconductor device further comprises a common terminal for one of biasing or controlling.
25. The capacitive parametric zero crossing detection circuit of claim 14 , wherein the nonlinear voltage controlled capacitive device comprises a pair of nonlinear voltage controlled capacitive devices having a common terminal.
26. The capacitive parametric zero crossing detection circuit of claim 14 , wherein the nonlinear voltage controlled capacitive device has a breakdown voltage of at least 130V.