IP Library Granted Patent US 9,799,621
Granted Patent B2
US 9,799,621 · App. 14/334,229 · Granted Oct 24, 2017

Semiconductor device and method of forming duplex plated bump-on-lead pad over substrate for finer pitch between adjacent traces

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,799,621
App. No.
14/334,229
Granted
Oct 24, 2017
Kind
B2
Abstract

A semiconductor device has a substrate. A conductive layer is formed over the substrate. A duplex plated bump on lead pad is formed over the substrate. An insulating layer is formed over the conductive layer and the substrate. A portion of the insulating over the duplex plated bump on lead pad is removed using a laser direct ablation process. The insulating layer is a lamination layer. The duplex plated bump on lead pad has a wide bump on lead pad. A semiconductor die is mounted over the substrate. The semiconductor die has a composite conductive interconnect structure. The semiconductor die has a first bump and a second bump with a pitch ranging from 90-150 micrometers between the first bump and the second bump. A duplex plated contact pad is formed on a surface of the substrate opposite the duplex plated bump-on-lead pad.

Claims (23)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first patterning layer over the substrate;

forming a plurality of conductive segments over the substrate within a plurality of openings of the first patterning layer;

forming a second patterning layer over the first patterning layer and conductive segments;

forming a first conductive layer within an opening of the second patterning layer, wherein the opening of the second patterning layer is aligned with one of the openings in the first patterning layer and the first conductive layer includes a cross-sectional width equal to a cross-sectional width of a first one of the conductive segments and in contact with the first one of the conductive segments and vertically offset from a second one of the conductive segments; and

forming an insulating layer over the substrate, first conductive layer, and conductive segments after forming the first conductive layer, wherein the insulating layer is disposed between the first one of the conductive segments and the second one of the conductive segments and contacts a surface of the second one of the conductive segments opposite the substrate.

2. The method of claim 1 , further including removing a portion of the insulating layer to expose the first conductive layer.

3. The method of claim 1 , further including removing a portion of the insulating layer by a laser direct ablation.

4. The method of claim 1 , wherein forming the insulating layer over the substrate includes pressing the insulating layer over the first conductive layer and conductive segments.

5. The method of claim 1 , further including forming a contact pad over a surface of the substrate opposite the first conductive layer.

6. The method of claim 1 , further including disposing a semiconductor die over the substrate.

7. The method of claim 1 , wherein forming the conductive segments includes:

forming a second conductive layer over the substrate; and

forming a third conductive layer over the second conductive layer.

8. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first conductive layer over the substrate;

forming a second conductive layer having a cross-sectional width equal to a cross-sectional width of a first portion of the first conductive layer, wherein the second conductive layer is disposed over the first portion of the first conductive layer and vertically offset from a second portion of the first conductive layer;

forming an insulating layer over the substrate, first conductive layer, and second conductive layer after forming the second conductive layer, wherein the insulating layer is disposed between the first portion of the first conductive layer and the second portion of the first conductive layer and contacts a surface of the second portion of the first conductive layer opposite the substrate; and

disposing an interconnect structure over the second conductive layer, wherein the interconnect structure extends to a surface of the insulating layer recessed below a surface of the second conductive layer.

9. The method of claim 8 , further including removing a portion of the insulating layer from over the second conductive layer.

10. The method of claim 8 , wherein forming the insulating layer includes disposing the insulating layer over the first conductive layer and pressing the insulating layer toward the substrate.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →