IP Library Granted Patent US 7,236,023
Granted Patent B2
US 7,236,023 · App. 11/106,288 · Granted Jun 26, 2007

Apparatus and methods for adaptive trip point detection

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Quick Facts
Patent No.
US 7,236,023
App. No.
11/106,288
Granted
Jun 26, 2007
Kind
B2
Abstract

Apparatus and methods are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value. In particular, the trip point reference value is adjusted to compensate for variations in process or temperature, without requiring an externally-supplied reference signal.

Claims (28)

1. A trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value, the trip point detector circuit comprising:

a circuit element that adjusts the trip point reference value to compensate for variations in process or temperature, without requiring an externally-supplied reference signal, wherein the circuit element conducts substantially no current except under predetermined process or temperature conditions.

2. The trip point detector circuit of claim 1 , wherein the circuit element operates to increase the trip point reference value.

3. The trip point detector circuit of claim 1 , wherein the circuit element operates to decrease the trip point reference value.

4. The trip point detector circuit of claim 1 , wherein the circuit element adjusts the trip point reference value based on a value of a transistor threshold voltage.

5. The trip point detector circuit of claim 1 , wherein the circuit element comprises a controlled current source.

6. The trip point detector circuit of claim 5 , wherein the controlled current source conducts a current that varies based on process and temperature conditions.

7. The trip point detector circuit of claim 5 , wherein the controlled current source comprises a transistor.

8. The trip point detector circuit of claim 5 , wherein the controlled current source comprises a depletion-mode transistor.

9. A method for adapting a trip point reference value of a trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds the trip point reference value, the method comprising:

providing a circuit element adapted to adjust the trip point reference value to compensate for variations in process or temperature, without requiring an externally-supplied reference signal, wherein the circuit element conducts substantially no current except under predetermined process or temperature conditions.

10. The method of claim 9 , wherein adjusting comprises increasing the trip point reference value.

11. The method of claim 9 , wherein adjusting comprises decreasing the trip point reference value.

12. The method of claim 9 , wherein adjusting comprises adjusting the trip point reference value based on a value of a transistor threshold voltage.

13. The method of claim 9 , wherein adjusting comprises adjusting a current in the trip detector circuit based on process and temperature conditions.

14. The method of claim 9 , wherein the trip point detector circuit comprises a first transistor having a first threshold voltage, and a second transistor having a second threshold voltage, and wherein adjusting comprises switching between the first and second transistors.

15. The method of claim 14 , wherein the first threshold voltage is higher than the second threshold voltage.

16. A trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value, the trip point detector circuit comprising:

a first transistor coupled between the input signal node and an internal node;

a second transistor coupled between the internal node and the output signal node; and

a controlled current source coupled to the internal signal node, the controlled current source adjusting the trip point reference value to compensate for variations in process or temperature, without requiring an externally-supplied reference signal, wherein the controlled current source conducts substantially no current except under predetermined process or temperature conditions.

17. The trip point detector circuit of claim 16 , wherein the controlled current source comprises a transistor.

18. The trip point detector circuit of claim 16 , wherein the controlled current source comprises a depletion-mode transistor.

19. A trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value, the trip point detector circuit comprising:

a first transistor coupled between the input signal node and an internal node;

a second transistor coupled between the internal node and the output signal node; and

a controlled current source coupled to the output signal node, the controlled current source adjusting the trip point reference value to compensate for variations in process or temperature, without requiring an externally-supplied reference signal, wherein the controlled current source is adapted to conduct substantially no current under nominal process and nominal temperature conditions, and the second transistor and controlled current source are adapted to simultaneously conduct current under predetermined process and temperature conditions.

20. The trip point detector circuit of claim 19 , wherein the controlled current source comprises a transistor.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038813/0004 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECTIVE MERGER TO ADD PAGES TO THE MERGER DOCUMENT PREVIOUSLY RECORDED PREVIOUSLY RECORDED ON REEL 017544 FRAME 0769. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 2, 2007
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 018950/0686 →
MERGER Recorded Apr 28, 2006
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 017544/0769 →
CORRECTIVE ASSIGNMENT FOR REEL/FRAME 016477/0765,CORRECTING THE EXECUTION DATE Recorded Sep 20, 2005
From: THORP, TYLER J.; JOHNSON, MARK G.; HAUKNESS, BRENT
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 016828/0264 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2005
From: THORP, TYLER J.; JOHNSON, MARK G.; HAUKNESS, BRENT
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 016477/0765 →