IP Library Granted Patent US 7,404,026
Granted Patent B2
US 7,404,026 · App. 11/400,902 · Granted Jul 22, 2008

Multi media card with high storage capacity

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Quick Facts
Patent No.
US 7,404,026
App. No.
11/400,902
Granted
Jul 22, 2008
Kind
B2
Abstract

A multi media card includes a plurality of memory modules and an extraneous command decoder. The extraneous command decoder decodes a predetermined command for determining a selected memory module to be accessed from the plurality of memory modules, when a predetermined bit of the predetermined command is set to a predetermined logic level.

Claims (43)

1. A multi media card, comprising:

a plurality of memory modules;

an extraneous command decoder that decodes a predetermined command as indicated by a predetermined command identifier bit pattern, for determining a newly selected memory module to be accessed from the plurality of memory modules when a predetermined bit of the predetermined command is set to a predetermined logic level; and

a usual command decoder that decodes the predetermined command for determining an operation to be performed on a predetermined one of the plurality of memory modules when the predetermined bit of the predetermined command is not set to the predetermined logic level;

wherein the predetermined memory module is different from any newly selected memory module.

2. The multi media card of claim 1 , wherein the usual command decoder decodes any command that is not the predetermined command for performing a corresponding operation on a latest selected memory module.

3. The multi media card of claim 1 , wherein the operation to be performed on the predetermined memory module is a block read/write operation, and wherein the predetermined command specifies a block length for the block read/write operation.

4. The multi media card of claim 1 , wherein the extraneous command decoder is inactivated when the predetermined bit of the predetermined command is not set to the predetermined logic level.

5. The multi media card of claim 1 , wherein the usual command decoder decodes at least one subsequent command for at least one memory operation on the newly selected memory module.

6. The multi media card of claim 1 , wherein a selected bit that is set to a first logic level with a remainder of a set of bits of the predetermined command being set to a second logic level indicates the newly selected memory module.

7. The multi media card of claim 1 , wherein a bit pattern of a set of bits of the predetermined command indicates the newly selected memory module.

8. An electronic device, comprising:

a multi media card including:

a plurality of memory modules;

an extraneous command decoder that decodes a predetermined command as indicated by a predetermined command identifier bit pattern, for determining a newly selected memory module to be accessed from the plurality of memory modules when a predetermined bit of the predetermined command is set to a predetermined logic level; and

a usual command decoder that decodes the predetermined command for determining an operation to be performed on a predetermined one of the plurality of memory modules when the predetermined bit of the predetermined command is not set to the predetermined logic level;

wherein the predetermined memory module is different from any newly selected memory module; and

a host system including:

a processor; and

a memory device having sequences of instructions stored thereon, wherein execution of the sequences of instructions by the processor causes the processor to perform the step of:

setting the predetermined bit of the predetermined command to the predetermined logic level for indicating access to the newly selected memory module.

9. The electronic device of claim 8 , wherein the usual command decoder decodes any command that is not the predetermined command for performing a corresponding operation on a latest selected memory module.

10. The electronic device of claim 8 , wherein the operation to be performed on the predetermined memory module is a block read/write operation, and wherein the predetermined command specifies a block length for the block read/write operation.

11. The electronic device of claim 8 , wherein the processor further performs the step of setting the predetermined bit of the predetermined command to another logic level different from the predetermined logic level for indicating access to the predetermined memory module.

12. The electronic device of claim 8 , wherein the extraneous command decoder is inactivated when the predetermined bit of the predetermined command is not set to the predetermined logic level.

13. The electronic device of claim 8 , wherein the processor further performs the step of generating at least one subsequent command to be decoded by the usual command decoder for at least one memory operation of the newly selected memory module.

14. The electronic device of claim 13 , wherein the processor further performs the steps of:

issuing a first subsequent command to the multi media card for indicating a block read/write operation for the newly selected memory module; and

issuing a second subsequent command to the multi media card for indicating a stop to the block read/write operation after a desired amount of data has been read/written from/to the newly selected memory module.

15. The electronic device of claim 8 , wherein the processor further performs the step of setting a selected bit that is set to a first logic level with a remainder of a set of bits of the predetermined command being set to a second logic level to indicate the newly selected memory module.

16. The electronic device of claim 8 , wherein the processor further performs the step of setting a bit pattern of a set of bits of the predetermined command to indicate the newly selected memory module.

17. A method of accessing a plurality of memory modules in an electronic device, comprising:

setting at a host system of the electronic device, a predetermined bit of a predetermined command to a predetermined logic level for indicating access to a newly selected memory module of a plurality of memory modules of a multi media card, the predetermined command being indicated by a predetermined command identifier bit pattern;

decoding at the multi media card, the predetermined command for determining the newly selected memory module to be accessed when the predetermined bit of the predetermined command is set to the predetermined logic level; and

decoding within the multi media card, the predetermined command that specifies an operation to be performed on a predetermined one of the plurality of memory modules when the predetermined bit of the predetermined command is not set to the predetermined logic level;

wherein the predetermined memory module is different from any newly selected memory module.

18. The method of claim 17 , further comprising:

decoding within the multi media card, any command that is not the predetermined command for performing a corresponding operation on a latest selected memory module.

19. The method of claim 17 , wherein the operation to be performed on the predetermined memory module is a block read/write operation, and wherein the predetermined command specifies a block length for the block read/write operation.

20. The method of claim 17 , further comprising:

setting a selected bit to a first logic level with a remainder of a set of bits of the predetermined command being set to a second logic level to indicate the newly selected memory module.

21. The method of claim 17 , further comprising:

setting a bit pattern of a set of bits of the predetermined command to indicate the newly selected memory module.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 041175/0939 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040908/0960 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036039/0406 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Dec 30, 2014
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 034715/0305 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2006
From: HASAN, QAMRUL; MAH, JEREMY; ROSNER, STEPHAN; ISAAC, ROGER DWAIN
To: SPANSION LLC.
Reel/Frame 017780/0826 →