IP Library Granted Patent US 8,304,904
Granted Patent B2
US 8,304,904 · App. 12/700,114 · Granted Nov 6, 2012

Semiconductor device with solder bump formed on high topography plated Cu pads

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Quick Facts
Patent No.
US 8,304,904
App. No.
12/700,114
Granted
Nov 6, 2012
Kind
B2
Abstract

A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. The second insulating layer has a sidewall between a surface of the second insulating material and surface of the second conductive layer. A protective layer is formed over the second insulating layer and surface of the second conductive layer. The protective layer follows a contour of the surface and sidewall of the second insulating layer and second conductive layer. A bump is formed over the surface of the second conductive layer and a portion of the protective layer adjacent to the second insulating layer. The protective layer protects the second insulating layer.

Claims (50)

1. A semiconductor device, comprising:

a substrate;

a first conductive layer formed over the substrate;

a first insulating layer formed over the substrate and first conductive layer;

a second conductive layer formed over the first conductive layer and first insulating layer;

a second insulating layer formed over the first insulating layer and second conductive layer, the second insulating layer having an opening with a sidewall between a surface of the second insulating layer and a surface of the second conductive layer;

a protective layer formed over the sidewall of the second insulating layer; and

a bump formed in direct contact with the surface of the second conductive layer and in direct contact with a portion of the protective layer adjacent to the sidewall of the second insulating layer to protect the second insulating layer.

2. The semiconductor device of claim 1 , wherein the protective layer includes an insulating material.

3. The semiconductor device of claim 1 , wherein the protective layer includes a material selected from the group consisting of titanium, titanium-tungsten, tantalum, silicon nitride, silicon dioxide, and silicide.

4. The semiconductor device of claim 1 , further including a third conductive layer formed over the first conductive layer and first insulating layer.

5. The semiconductor device of claim 4 , further including a fourth conductive layer formed over the third conductive layer.

6. A semiconductor device, comprising:

a substrate;

a redistribution layer formed over the substrate;

a first insulating layer formed over the substrate and redistribution layer, the first insulating layer having an opening with a sidewall between a surface of the first insulating layer and a surface of the redistribution layer;

a protective layer formed over the sidewall of the first insulating layer; and

a bump formed in direct contact with the surface of the redistribution layer and in direct contact with a portion of the protective layer to protect the first insulating layer.

7. The semiconductor device of claim 6 , wherein the protective layer includes an insulating material.

8. The semiconductor device of claim 6 , wherein the protective layer includes a material selected from the group consisting of titanium, titanium-tungsten, tantalum, silicon nitride, silicon dioxide, and silicide.

9. The semiconductor device of claim 6 , further including:

an input/output (I/O) pad formed over the substrate;

a second insulating layer formed over the substrate and I/O pad; and

a third conductive layer formed over the I/O pad and second insulating layer.

10. The semiconductor device of claim 9 , further including a fourth conductive layer formed over the third conductive layer.

11. A semiconductor device, comprising:

a substrate;

a first conductive layer formed over the substrate;

a first insulating layer formed over the substrate, the first insulating layer having an opening with a sidewall between a surface of the first insulating layer and a surface of the first conductive layer;

an insulating protective layer formed over the sidewall of the first insulating layer; and

a bump formed over the surface of the first conductive layer and a portion of the insulating protective layer.

12. The semiconductor device of claim 11 , wherein the insulating protective layer includes a material selected from the group consisting of silicon nitride and silicon dioxide.

13. The semiconductor device of claim 11 , further including:

a second conductive layer formed over the substrate;

a second insulating layer formed over the substrate and second conductive layer; and

a third conductive layer formed over the second conductive layer and second insulating layer.

14. The semiconductor device of claim 13 , further including a fourth conductive layer formed over the third conductive layer.

15. A semiconductor device, comprising:

a substrate;

a first conductive layer formed over the substrate;

a first insulating layer formed over the substrate, wherein the first insulating layer includes a sidewall between a surface of the first insulating layer and a surface of the first conductive layer;

a protective layer formed over the first insulating layer; and

a bump formed in direct contact with the first conductive layer, wherein the protective layer protects the first insulating layer.

16. The semiconductor device of claim 15 , wherein the bump is formed over a portion of the protective layer adjacent to the sidewall of the first insulating layer.

17. The semiconductor device of claim 15 , wherein the protective layer includes a material selected from the group consisting of titanium, titanium-tungsten, tantalum, silicon nitride, silicon dioxide, and silicide.

18. The semiconductor device of claim 15 , further including:

a second conductive layer formed over the substrate;

a second insulating layer formed over the substrate and first conductive layer;

a third conductive layer formed over the second conductive layer and second insulating layer; and

a fourth conductive layer formed over the third conductive layer.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0252. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0784 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0252 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0343 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →