Integrated circuit packaging system with formed under-fill and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

forming a flow restrictor on the substrate;

mounting an integrated circuit above the substrate and adjacent to the flow restrictor with an interconnect directly connecting between the substrate and the integrated circuit; and

forming an under-fill between the integrated circuit and the substrate, the under-fill in direct contact with the flow restrictor;

removing the flow restrictor for creating a cast side of the under-fill spaced away from a peripheral side of the integrated circuit and the cast side formed with the vertical and planar characteristics of having been in direct contact with the flow restrictor.

2. The method as claimed in claim 1 wherein forming the under-fill includes forming the cast side having chemical etchant traces, etching marks, pitting, stress lines, deformation lines, surface degradation or a combination thereof.

3. The method as claimed in claim 1 wherein:

providing the substrate includes providing the substrate having an opening traversing the height of the substrate; and

forming the under-fill includes dispensing the under-fill through the opening with the cast side formed between the integrated circuit and the substrate.

4. The method as claimed in claim 1 further comprising forming an encapsulation encapsulating the cast side.

5. The method as claimed in claim 1 further comprising mounting discrete components on the substrate.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

forming a flow restrictor on the substrate;

mounting an integrated circuit above the substrate and adjacent to the flow restrictor with an interconnect directly connecting between the substrate and the integrated circuit;

forming an under-fill between the integrated circuit and the substrate, and the under-fill in direct contact with the flow restrictor;

creating a cast side of the under-fill by removing the flow restrictor, the cast side of the under-fill spaced away from a peripheral side of the integrated circuit and the cast side formed with the vertical and planar characteristics of having been in direct contact with the flow restrictor; and

forming an encapsulation encapsulating the cast side.

7. The method as claimed in claim 6 wherein forming the under-fill having the cast side includes forming the cast side 100-150 μm from the integrated circuit.

8. The method as claimed in claim 6 wherein:

mounting the integrated circuit includes mounting a first integrated circuit;

further comprising:

mounting a second integrated circuit over the first integrated circuit; and

connecting an interconnect between the substrate and the second integrated circuit and peripheral to the cast side.

9. The method as claimed in claim 6 further comprising:

mounting a first integrated circuit above the substrate;

wherein:

mounting the integrated circuit above the substrate includes mounting a second integrated circuit above the substrate and above the first integrated circuit; and

forming the under-fill between the integrated circuit and the substrate includes forming the under-fill between the second integrated circuit and the first integrated circuit.

10. The method as claimed in claim 6 further comprising:

forming columns peripheral to the cast side and above the substrate; and

mounting a top package above the integrated circuit and connected to the substrate with the columns in direct contact with the top package and the substrate.

11. An integrated circuit packaging system comprising:

a substrate;

an integrated circuit above the substrate;

an interconnect directly connecting between the substrate and the integrated circuit; and

an under-fill between the integrated circuit and the substrate having a cast side, the cast side of the under-fill spaced away from a peripheral side of the integrated circuit and the cast side thinned with the vertical and planar characteristics of having been in direct contact with a flow restrictor which has been formed on and removed from the substrate.

12. The system as claimed in claim 11 wherein the cast side includes chemical etchant traces, etching marks, pitting, stress lines, deformation lines, surface degradation or a combination thereof.

13. The system as claimed in claim 11 wherein:

the substrate has an opening traversing the height of the substrate; and

the under-fill is in the opening and the cast side are between the integrated circuit and the substrate.

14. The system as claimed in claim 11 further comprising an encapsulation encapsulating the cast side.

15. The system as claimed in claim 11 further comprising discrete components mounted on the substrate.

16. The system as claimed in claim 11 further comprising an external interconnect below the substrate.

17. The system as claimed in claim 16 wherein the cast side is 100-150 μm from the integrated circuit.

18. The system as claimed in claim 16 wherein:

the integrated circuit is a first integrated circuit;

further comprising:

a second integrated circuit over the first integrated circuit; and

a second interconnect between the substrate and the second integrated circuit and peripheral to the cast side.

19. The system as claimed in claim 16 further comprising:

a first integrated circuit above the substrate;

wherein:

the integrated circuit is a second integrated circuit above the substrate and above the first integrated circuit; and

the under-fill is between the second integrated circuit and the first integrated circuit.

20. The system as claimed in claim 16 further comprising:

columns peripheral to the cast side and above the substrate; and

a top package above the integrated circuit and connected to the substrate with the columns in direct contact with the top package and the substrate.