IP Library Granted Patent US 8,809,191
Granted Patent B2
US 8,809,191 · App. 13/324,446 · Granted Aug 19, 2014

Semiconductor device and method of forming UBM structure on back surface of TSV semiconductor wafer

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Quick Facts
Patent No.
US 8,809,191
App. No.
13/324,446
Granted
Aug 19, 2014
Kind
B2
Abstract

A semiconductor device has a plurality of conductive vias formed through the semiconductor die with a first insulating layer around the conductive vias. A recess is formed in the first insulating layer around the conductive vias by LDA. A portion of the semiconductor wafer is removed by LDA after forming the recess in the first insulating layer so that the conductive vias extend above a surface of the semiconductor wafer. The first insulating layer extends to the surface of the semiconductor wafer or above the surface of the semiconductor wafer. A second insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the second insulating layer is removed by LDA, while leaving a second portion of the second insulating layer over the surface of the semiconductor wafer around the conductive vias. An electroless plated bump is formed over the conductive vias.

Claims (56)

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer;

forming a plurality of vias through the semiconductor wafer;

forming a first insulating layer over sidewalls of the vias;

depositing conductive material over the first insulating layer in the vias to form conductive vias;

forming a recess in the first insulating layer around the conductive vias;

removing a portion of the semiconductor wafer after forming the recess in the first insulating layer so that the conductive vias extend above a surface of the semiconductor wafer;

forming a second insulating layer over the surface of the semiconductor wafer and conductive vias;

removing a first portion of the second insulating layer while leaving a second portion of the second insulating layer over the surface of the semiconductor wafer around the conductive vias; and

forming a bump over the conductive vias.

2. The method of claim 1 , wherein removing the portion of the semiconductor wafer after forming the recess in the first insulating layer reduces cracking of the first insulating layer.

3. The method of claim 1 , wherein the first insulating layer extends to the surface of the semiconductor wafer.

4. The method of claim 1 , wherein the first insulating layer extends above the surface of the semiconductor wafer.

5. The method of claim 1 , further including forming the recess in the first insulating layer around the conductive vias by laser direct ablation.

6. The method of claim 1 , further including forming the bump over the conductive vias by electroless plating.

7. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a conductive via through the semiconductor die with a first insulating layer around the conductive via;

forming a recess in the first insulating layer around the conductive via;

removing a portion of the semiconductor die after forming the recess in the first insulating layer so that the conductive via extends above a surface of the semiconductor die; and

forming a second insulating layer over the surface of the semiconductor die with the conductive via extending above the second insulating layer.

8. The method of claim 7 , further including forming a bump over the conductive via.

9. The method of claim 8 , further including forming the bump over the conductive via by electroless plating.

10. The method of claim 7 , wherein removing the portion of the semiconductor die after forming the recess in the first insulating layer reduces cracking of the first insulating layer.

11. The method of claim 7 , wherein the first insulating layer extends to the surface of the semiconductor die.

12. The method of claim 7 , wherein the first insulating layer extends above the surface of the semiconductor die.

13. The method of claim 7 , further including forming the recess in the first insulating layer around the conductive via by laser direct ablation.

14. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a conductive via through the semiconductor die including a first insulating layer around the conductive via;

forming a recess in the first insulating layer around the conductive via;

removing a portion of the semiconductor die so that the conductive via extends above a surface of the semiconductor die and the first insulating layer;

forming a second insulating layer over the surface of the semiconductor die;

removing a portion of the second insulating layer to leave the conductive via extending above the second insulating layer; and

removing the portion of the semiconductor die after forming the recess in the first insulating layer to reduce cracking of the first insulating layer.

15. The method of claim 14 , further including forming a bump over the conductive via.

16. The method of claim 15 , further including forming the bump over the conductive via by electroless plating.

17. The method of claim 14 , wherein the first insulating layer extends to the surface of the semiconductor die.

18. The method of claim 14 , wherein the first insulating layer extends above the surface of the semiconductor die.

19. The method of claim 14 , wherein the first insulating layer extends to a surface of the second insulating layer.

20. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via through the substrate including a first insulating layer around the conductive via;

forming a second insulating layer over the substrate with a sidewall of the conductive via exposed above the second insulating layer; and

removing a portion of the substrate after forming a recess in the first insulating layer to reduce cracking of the first insulating layer.

21. The method of claim 20 , further including forming a bump over the conductive via.

22. The method of claim 20 , wherein the first insulating layer extends above a surface of the substrate.

23. The method of claim 20 , wherein the first insulating layer extends to a surface of the substrate.

24. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via through the substrate including a first insulating layer around the conductive via;

forming a second insulating layer over the substrate with a sidewall of the conductive via exposed from the second insulating layer; and

removing a portion of the substrate after forming a recess in the first insulating layer to reduce cracking of the first insulating layer.

25. The method of claim 24 , further including forming a bump over the conductive via.

26. The method of claim 24 , wherein the first insulating layer extends above a surface of the substrate.

27. The method of claim 24 , wherein the first insulating layer extends to a surface of the substrate.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED ON REEL 038378 FRAME 0418. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064908/0920 →
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053511/0298 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0208 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0418 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2011
From: CHOI, WON KYOUNG; YONG, CHANG BUM; KU, JAE HUN
To: STATS CHIPPAC, LTD.
Reel/Frame 027373/0054 →