Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer
A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle vias or full-circle vias. The metal vias are surrounded by organic material. Redistribution layers (RDL) are formed on a second surface of the die opposite the first surface. The RDL and through-hole vias (THV) provide expanded interconnect flexibility to adjacent die. Repassivation layers are formed between the RDL on the second surface of the die for electrical isolation. The die are stackable and can be placed in a semiconductor package with other die. The RDL provide electrical interconnect to the adjacent die. Bond wires and solder bumps also provide electrical connection to the semiconductor die.
1. A method of making a semiconductor device, comprising:
providing a plurality of first semiconductor die;
forming a separation area between the first semiconductor die;
depositing an insulating material in the separation area between the first semiconductor die extending from a first surface of the first semiconductor die to a second surface of the first semiconductor die opposite the first surface;
forming a via through the insulating material;
forming a conductive trace between the first surface of the first semiconductor die and the via;
forming a conductive layer over the second surface of the first semiconductor die opposite the first surface of the first semiconductor die and including a portion of the conductive layer connected to the via; and
singulating the first semiconductor die through the insulating material while leaving the conductive via intact.
2. The method of claim 1 , further including forming the conductive trace between a contact pad on the first semiconductor die and the via.
3. The method of claim 1 , further including forming an insulating layer over the second surface of the first semiconductor die.
4. The method of claim 1 , further including forming the vias side-by-side through the insulating material.
5. The method of claim 1 , further including disposing a second semiconductor die over the first surface of the first semiconductor die or the second surface of the first semiconductor die.
6. The method of claim 1 , further including stacking the plurality of first semiconductor die.
7. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
depositing an insulating material in a separation area between the first semiconductor die;
forming a plurality of vias through the insulating material;
forming a first conductive layer from a first surface of the first semiconductor die to the vias;
depositing a conductive material in the vias to form a plurality of conductive vias after forming the first conductive layer; and
forming a second conductive layer over the conductive vias and a second surface of the first semiconductor die opposite the first surface of the first semiconductor die.
8. The method of claim 7 , wherein the second conductive layer is electrically connected to the conductive vias.
9. The method of claim 7 , further including forming an insulating layer over the second surface of the first semiconductor die.
10. The method of claim 7 , further including forming the conductive vias side-by-side in the insulating material.
11. The method of claim 7 , further including disposing a second semiconductor die over the first surface of the first semiconductor die or the second surface of the first semiconductor die.
12. The method of claim 7 , further including:
stacking a plurality of first semiconductor die; and
electrically connecting the stacked first semiconductor die through the conductive vias.
13. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
depositing an insulating material around a peripheral region of the first semiconductor die and substantially coplanar with an active surface of the first semiconductor die;
forming a plurality of vias through the insulating material;
forming a first conductive layer over the active surface of the first semiconductor die between a contact pad on the active surface and the vias; and
forming a second conductive layer over the vias and a second surface of the first semiconductor die opposite the active surface of the first semiconductor die.
14. The method of claim 13 , further including forming the vias side-by-side around the peripheral region of the first semiconductor die.
15. The method of claim 13 , further including forming an insulating layer over the active surface of the first semiconductor die.
16. The method of claim 13 , further including disposing a second semiconductor die over the first semiconductor die.
17. The method of claim 13 , further including stacking a plurality of first semiconductor die.
18. A semiconductor device, comprising:
a plurality of first semiconductor die;
an insulating material deposited in a die separation area between the first semiconductor die and substantially coplanar with an active surface of the first semiconductor die;
a plurality of conductive vias formed through the insulating material;
a first conductive layer extending from a contact pad on the active surface of the first semiconductor die to the conductive vias; and
a second conductive layer formed over the conductive vias and a second surface of the first semiconductor die opposite the active surface of the first semiconductor die.
19. The semiconductor device of claim 18 , further including a second semiconductor die disposed over one of the first semiconductor die.
20. The semiconductor device of claim 18 , further including a plurality of stacked first semiconductor die electrically connected through the conductive vias.