IP Library Granted Patent US 8,846,454
Granted Patent B2
US 8,846,454 · App. 13/555,531 · Granted Sep 30, 2014

Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer

Inventors: Il Kwon Shim (Singapore, SG); Yaojian Lin (Singapore, SG); Seng Guan Chow (Singapore, SG)
Assignee: STATS ChipPAC, Ltd.
H01L23/3128H01L2924/01078H01L2924/01005H01L2924/19043H01L2924/01074H01L2924/15331H01L2924/01033H05K1/186H01L2224/18H01L24/18H01L2924/19041H01L2924/30105H01L2924/14H01L2924/19105H01L2224/83192H01L2924/01079H01L2924/01013H01L2225/1058H01L2924/01029H01L23/5389H05K1/185H01L2224/16H05K2201/10674H01L2924/01047H01L2224/92144H01L2224/82039H01L2221/68345H01L2924/15311H01L21/6835H01L2924/014H01L23/50H05K2201/09509H01L21/568H01L25/16H01L25/105H01L2924/01006H01L2924/15174H01L2924/0105H01L2225/1023H01L2924/19042H05K3/4602H01L2924/01082
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Quick Facts
Patent No.
US 8,846,454
App. No.
13/555,531
Granted
Sep 30, 2014
Kind
B2
Abstract

A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.

Claims (64)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

providing a first insulating layer over the semiconductor die;

depositing an encapsulant around the semiconductor die and over the first insulating layer;

forming a second insulating layer over the semiconductor die, encapsulant, and first insulating layer after depositing the encapsulant;

forming an opening in the first and second insulating layers using a laser, the opening extending to the semiconductor die;

forming a first conductive layer within the opening and over the first insulating layer;

forming a third insulating layer over the first insulating layer and first conductive layer; and

forming a via through the third insulating layer and over the first insulating layer using the laser to expose the first conductive layer.

2. The method of claim 1 , further including forming a conductive material within the via.

3. The method of claim 1 , further including disposing a semiconductor component outside a footprint of the semiconductor die.

4. The method of claim 1 , further including forming an interconnect structure over the semiconductor die and encapsulant.

5. The method of claim 4 , wherein forming the interconnect structure includes:

forming a second conductive layer over the second insulating layer; and

forming a plurality of bumps over the second conductive layer.

6. A method of making a semiconductor device, comprising:

providing a semiconductor die;

providing a first insulating layer over the semiconductor die;

forming a second insulating layer over the first insulating layer;

depositing an encapsulant around the semiconductor die;

forming an interconnect structure over the semiconductor die by using a laser to form an opening through the first insulating layer and second insulating layer to electrically connect the interconnect structure to the semiconductor die; and

forming a via through the encapsulant using the laser.

7. The method of claim 6 , wherein forming the interconnect structure includes forming a first conductive layer within the laser-formed opening and over the first insulating layer and second insulating layer.

8. The method of claim 7 , wherein forming the interconnect structure further includes

forming a second conductive layer over the second insulating layer.

9. The method of claim 6 , further including forming a conductive material within the via.

10. The method of claim 6 , further including disposing a semiconductor component outside a footprint of the semiconductor die.

11. The method of claim 6 , further including providing a substrate with the semiconductor die mounted to the substrate and the first insulating layer disposed between the substrate and semiconductor die.

12. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first insulating layer over the semiconductor die and encapsulant;

forming a first opening in the first insulating layer over the semiconductor die using a laser;

forming a first conductive layer in the first opening in the first insulating layer;

forming a second insulating layer over the first insulating layer and first conductive layer; and

forming a second opening in the second insulating layer using the laser to expose the first conductive layer.

13. The method of claim 12 , further including forming a second conductive layer over the first conductive layer.

14. The method of claim 12 , further including providing a substrate with the semiconductor die mounted to the substrate and the first insulating layer disposed between the substrate and semiconductor die.

15. The method of claim 12 , further including forming a via through the encapsulant using the laser.

16. The method of claim 15 , further including disposing a semiconductor component outside a footprint of the semiconductor die.

17. The method of claim 16 , further including forming an interconnect structure over the semiconductor die and encapsulant.

18. A method of making a semiconductor device, comprising:

providing a semiconductor die;

disposing a first insulating layer over the semiconductor die, the first insulating layer terminating within a footprint of the semiconductor die;

forming a first opening in the first insulating layer using a laser;

forming a second insulating layer over the first insulating layer and outside of the first opening; and

forming a second opening in the second insulating layer and over the first insulating layer using the laser.

19. The method of claim 18 , further including depositing an encapsulant over the semiconductor die.

20. The method of claim 19 , further including forming an interconnect structure over the semiconductor die and encapsulant.

21. The method of claim 19 , further including forming a via through the encapsulant using the laser.

22. The method of claim 19 , further including disposing a semiconductor component outside a footprint of the semiconductor die.

23. The method of claim 18 , wherein the first opening in the first insulating layer extends to the semiconductor die.

24. The method of claim 18 , wherein forming the first opening in the first insulating layer includes using maskless laser ablation.

25. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first insulating layer over the semiconductor die and encapsulant;

forming a first opening in the first insulating layer using maskless laser ablation to expose the semiconductor die;

forming a second insulating layer over the first insulating layer; and

forming a second opening in the second insulating layer with a sidewall of the second opening aligned with a sidewall of the first opening using maskless laser ablation.

26. The method of claim 25 , further including forming a conductive layer in the first and second openings.

27. The method of claim 25 , further including

forming a via through the encapsulant using maskless laser ablation.

28. The method of claim 27 , further including disposing a semiconductor component outside a footprint of the semiconductor die.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE ASSIGNEE'S NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0161. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064805/0735 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0161 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0352 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (4)
Continuation 13207633 · Aug 11, 2011
Continuation 12822080 · Jun 23, 2010
Division 11957101 · Dec 14, 2007
Related Publication 20120286422A1 · Nov 15, 2012