Trench patterning process using microcracking
A method includes forming a first-tier structure over a substrate, forming first-tier trenches laterally extending along a first horizontal direction and laterally spaced apart from each other along a second horizontal direction through the first-tier structure, non-conformally depositing a plurality of material layers over the first-tier structure such that first-tier cavities are formed in volumes of the first-tier trenches that are not filled with the plurality of material layers, and inducing laterally-extending cracks in portions of the plurality of material layers that overlie the first-tier cavities, such that the laterally-extending cracks are connected to a respective underlying one of the first-tier cavities and vertically extend to a topmost material layer of the plurality of material layers.
1 . A method, comprising:
forming a first-tier structure over a substrate;
forming first-tier trenches laterally extending along a first horizontal direction and laterally spaced apart from each other along a second horizontal direction through the first-tier structure;
non-conformally depositing a plurality of material layers over the first-tier structure such that first-tier cavities are formed in volumes of the first-tier trenches that are not filled with the plurality of material layers; and
inducing laterally-extending cracks in portions of the plurality of material layers that overlie the first-tier cavities, wherein the laterally-extending cracks are connected to a respective underlying one of the first-tier cavities and vertically extend to a topmost material layer of the plurality of material layers.
2 . The method of claim 1 , wherein the laterally-extending cracks are induced by performing an anneal process at an elevated temperature.
3 . The method of claim 2 , further comprising performing an anisotropic etch process after formation of the laterally-extending cracks, wherein the laterally-extending cracks are converted into second-tier trenches that are adjoined to a respective one of the first-tier trenches.
4 . The method of claim 3 , wherein the materials of the plurality of material layers that are deposited in the first-tier trenches are removed by the anisotropic etch process.
5 . The method of claim 3 , wherein a total thickness of the plurality of material layers located above a topmost horizontal surface of the first-tier structure is at least 10 times a maximum lateral width of the first-tier trenches.
6 . The method of claim 3 , wherein the plurality of material layers comprise a second-tier structure comprising an alternating stack of insulating layers and sacrificial material layers.
7 . The method of claim 6 , wherein:
the insulating layers comprise silicon oxide layers; and
the sacrificial material layers comprise hydrogen-containing silicon nitride layers.
8 . The method of claim 7 , wherein an atomic ratio of hydrogen atoms to silicon atoms in the hydrogen-containing silicon nitride layers is in a range from 0.05 to 0.20 prior to the inducing the laterally-extending cracks.
9 . The method of claim 7 , wherein:
the laterally-extending cracks are induced by performing an anneal process at an elevated temperature in a nitrogen-containing ambient; and
the anneal process reduces hydrogen content in the hydrogen-containing silicon nitride layers.
10 . The method of claim 6 , further comprising:
forming laterally-extending cavities by removing the sacrificial material layers selective to the insulating layers;
forming electrically conductive layers in the laterally-extending cavities by conformally depositing an electrically conductive material in the laterally-extending cavities; and
removing portions of the electrically conductive material from volumes of the first-tier trenches and the second-tier trenches, such that the electrically conductive layers are electrically isolated from each other.
11 . The method of claim 6 , further comprising:
forming a pair of crack-stop trenches at ends of the first-tier cavities; and
filling the pair of crack-stop trenches with a pair of crack-stop structures comprising a carbon or a semiconductor material.
12 . The method of claim 11 , wherein one of the laterally-extending cracks stops at the pair of crack-stop structures.
13 . The method of claim 11 , further comprising:
forming memory openings through the second-tier structure and the first-tier structure; and
depositing a set of conformal material layers in the memory openings and in the pair of crack-stop trenches, wherein:
memory opening fill structures comprise first portions of the set of conformal material layers that fill the memory openings;
the pair of crack-stop structures comprise second portions of the set of conformal material layers that fill the pair of crack-stop trenches; and
the set of conformal material layers comprise, in order of deposition, a blocking dielectric layer, a memory material layer, a tunneling dielectric layer, a semiconductor channel material layer, and a dielectric core layer.
14 . The method of claim 6 , wherein non-uniformities are located in the alternating stack above the first-tier cavities.
15 . The method of claim 14 , wherein the non-uniformities comprise microcracks.
16 . The method of claim 14 , wherein the non-uniformities comprise recesses.
17 . The method of claim 14 , wherein the non-uniformities comprise structurally weak regions.
18 . The method of claim 14 , further comprising forming wedges in an upper portion of the second-tier structure above the non-uniformities.
19 . The method of claim 6 , further comprising:
non-conformally depositing a plurality of additional material layers over the second-tier structure such that second-tier cavities are formed in volumes of the second-tier trenches that are not filled with the plurality of additional material layers; and
inducing additional laterally-extending cracks in portions of the plurality of additional material layers that overlie the second-tier cavities, wherein the additional laterally-extending cracks are connected to a respective underlying one of the second-tier cavities and vertically extend to a topmost material layer among the plurality of additional material layers.
20 . The method of claim 19 , further comprising:
expanding the additional laterally-extending cracks into third-tier trenches by performing an anisotropic etch process;
forming memory openings through patterned portions of the plurality of additional material layers, the first-tier structure, and the first-tier structure; and
forming memory opening fill structures in the memory openings, wherein each of the memory opening fill structures comprises a respective vertical stack of memory elements and a vertical semiconductor channel.