Patent Assignment
Reel/Frame 018746/0842
Security Interest
Recorded: 2007-01-05
Received: 2007-01-05
Pages: 19
Assignor
IRVINE SENSORS CORP.
Executed: 2006-12-29
Assignees
LONGVIEW FUND, L.P.
600 MONTGOMERY STREET, 44TH FLOOR, SAN FRANCISCO, CA, 94111, UNITED STATES
ALPHA CAPITAL ANSTALT
PRADAFANT 7, 9490 FURSTENTUMS, VADUZ, LIX, LIECHTENSTEIN
Covered Properties
(55)
Tier Structure with Tier Frame Having a Feedthrough Structure
Application:
11/524,090 →
Mems Cooling Device
Application:
11/511,117 →
High density interconnect assembly comprising stacked electronic module
Application:
11/499,403 →
Large format thermoelectric infrared detector and method of fabrication
Application:
60/809,466 →
Global Positioning Using Planetary Constants
Application:
11/429,468 →
Low Power Electronic Circuit Incorporating Real Time Clock
Application:
11/415,891 →
Ball grid array stack using picture frame interconnect
Application:
60/787,923 →
Method for image jitter reduction in a multilayer LADAR device
Application:
60/785,135 →
Method for Making a Neo-Layer Comprising Embedded Discrete Components
Application:
11/354,370 →
Stacked Ball Grid Array Package Module Utilizing One or More Interposer Layers
Application:
11/350,974 →
Absolute pressure sensor
Application:
60/758,922 →
Neo-wafer device comprised of multiple singulated integrated circuit die
Application:
11/302,480 →
Cornerbond assembly comprising three-dimensional electronic modules
Application:
11/301,645 →
Stacked Microelectronic Layer and Module with Three-Axis Channel T-Connects
Application:
11/259,683 →
Anti-Tamper Module
Application:
11/248,659 →
Stackable Layer Containing Ball Grid Array Package
Application:
11/229,351 →
Method for Precision Integrated Circuit Die Singulation Using Differential Etch Rates
Application:
11/197,828 →
Stackable Semiconductor Chip Layer Comprising Prefabricated Trench Interconnect Vias
Application:
11/150,712 →
Bga-Scale Stacks Comprised of Layers Containing Integrated Circuit Die and a Method for Making the Same
Application:
11/062,507 →
Imaging Device with Multiple Fields of View Incorporating Memory-Based Temperature Compensation of an Uncooled Focal Plane Array
Application:
11/048,634 →
Field Programmable Gate Array Incorporating Dedicated Memory Stacks
Application:
11/037,490 →
Vertically Stacked Pre-Packaged Integrated Circuit Chips
Application:
10/968,572 →
High Speed Switching Module Comprised of Stacked Layers Incorporating T-Connect Structures
Application:
10/960,712 →
Three-Dimensional Module Comprised of Layers Containing Ic Chips with Overlying Interconnect Layers
Application:
10/951,990 →
Three-dimensional imaging device incorporating stacked layers containing microelectronic circuits
Application:
10/805,849 →
Three-Dimensional Imaging Processing Module Incorporating Stacked Layers Containing Microelectronic Circuits
Application:
10/806,037 →
Method for Electrical Interconnection of Angularly Disposed Conductive Patterns
Application:
10/726,888 →
Neo-Wafer Device and Method
Application:
10/703,177 →
Method for Creating Neo-Wafers from Singulated Integrated Circuit Die and a Device Made According to the Method
Application:
10/701,783 →
Stacked microelectronic module with vertical interconnect vias
Application:
10/663,371 →
Stackable Layers Containing Ball Grid Array Packages
PCT:
PCTUS2003024706 ↗
Cryopump Piston Position Tracking
Application:
10/615,641 →
Multilayer Modules with Flexible Substrates
Application:
10/431,914 →
Stackable Layers Containing Ball Grid Array Packages
Application:
10/360,244 →
Field Programmable Gate Array with a Variably Wide Word Width Memory
Application:
10/347,038 →
Method for Effectively Embedding Various Integrated Circuits Within Field Programmable Gate Arrays
Application:
10/346,363 →
Method of Fabricating Known Good Dies from Packaged Integrated Circuits
Application:
10/338,974 →
High-Density Stacked Printed Circuit Board Assembly
Application:
10/339,023 →
Stackable Layers Containing Encapsulated Integrated Circuit Chips with One or More Overlying Interconnect Layers and a Method of Making the Same
Application:
10/302,680 →
Method and Apparatus for Temperature Compensation of an Uncooled Focal Plane Array
Application:
10/281,393 →
Highly Configuarable Capacitive Transducer Interface Circuit
Application:
10/110,889 →
Wearable biomonitor with flexible thinned integrated circuit
Application:
10/197,006 →
Video event capture, storage and processing method and apparatus
Application:
10/178,390 →
Stackable Microcircuit Layer Formed from a Plastic Encapsulated Microcircuit and Method of Making the Same
Application:
10/142,557 →
Method and Apparatus for Connecting Vertically Stacked Integrated Circuit Chips
Application:
10/128,728 →
Method of Making Stackable Layers Containing Encapsulated Integrated Circuit Chips with One or More Overlaying Interconnect Layers
Application:
09/938,686 →
High Speed Multi-Stage Switching Network Formed from Stacked Switching Layers
Application:
09/973,857 →
Stacking of Multilayer Modules
Application:
09/949,512 →
Stack of Multilayer Modules with Heat-Focussing Metal Layer
Application:
09/949,024 →
Multilayer Modules with Flexible Substrates
Application:
09/948,950 →
Retro-Reflector Warm Stop for Uncooled Thermal Imaging Cameras and Method of Using the Same
Application:
09/921,525 →
Method of Designing a Flexure System for Tuning the Modal Response of a Decoupled Micromachined Gyroscope and a Gyroscoped Designed According to the Method
Application:
09/893,329 →
Mems Sensor with Single Central Anchor and Motion-Limiting Connection Geometry
Application:
09/884,880 →
Method and Apparatus for Temperature Compensation of an Uncooled Focal Plane Array
Application:
09/853,819 →
Method of Canceling Quadrature Error in an Angular Rate Sensor
Application:
09/812,147 →