IP Library Assignment 019069/0028
Patent Assignment
Reel/Frame 019069/0028

Assignment of Assignor's Interest

Recorded: 2007-03-27 Pages: 6
Assignor
SPANSION INC.
Executed: 2007-01-31
Assignee
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453, MAIL STOP 250, SUNNYVALE, CALIFORNIA, 94088-3453
Covered Properties (35)
Reduction of Charge Loss in Nonvolatile Memory Cells by Phosphorus Implantation into Pecvd Nitride/Oxynitride Films
Patent: 5,940,735 →
Application: 08/917,149 →
Sidewall Spacer for Protecting Tunnel Oxide During Isolation Trench Formation in Self-Aligned Flash Memory Core
Patent: 5,981,341 →
Application: 08/986,160 →
Semiconductor Isolation Process to Minimize Weak Oxide Problems
Patent: 6,002,160 →
Application: 08/989,820 →
Flash Memory Gate Coupling Using Hsg Polysilicon
Patent: 6,555,867 →
Application: 08/991,448 →
Method to Improve Testing Speed of Memory
Patent: 5,907,561 →
Application: 08/992,077 →
Method for Fully Planarized Conductive Line for a Stack Gate
Patent: 6,027,998 →
Application: 08/992,536 →
Methods and Arrangements for Forming a Floating Gate in Non-Volatile Memory Semiconductor Devices
Patent: 6,034,394 →
Application: 08/992,950 →
Methods and Arrangements for Improved Formation of Control and Floating Gates in Non-Volatile Memory Semiconductor Devices
Patent: 6,258,669 →
Application: 08/992,960 →
Methods for Forming a Control Gate Apparatus in Non-Volatile Memory Semiconductor Devices
Patent: 6,063,662 →
Application: 08/993,409 →
Method for Forming Isolation in Flash Memory Wafer
Patent: 6,808,988 →
Application: 09/019,409 →
Trenched Gate Non-Volatile Semiconductor Device with the Source/Drain Regions Spaced from the Trench by Sidewall Dopings
Patent: 6,285,054 →
Application: 09/052,057 →
Trenched Gate Semiconductor Device and Method for Low Power Applications
Patent: 6,225,659 →
Application: 09/052,058 →
Fully Recessed Semiconductor Device and Method for Low Power Applications with Single Wrap Around Buried Drain Region
Patent: 6,147,378 →
Application: 09/052,060 →
Fully Recessed Semiconductor Device
Patent: 6,147,377 →
Application: 09/052,061 →
A Semiconductor Device Having a Reduced Height Floating Gate
Patent: 6,034,395 →
Application: 09/092,352 →
Low Temperature Photoresist Removal for Rework During Metal Mask Formation
Patent: 6,174,819 →
Application: 09/119,777 →
Multipurpose Graded Silicon Oxynitride Cap Layer
Patent: 6,100,559 →
Application: 09/134,525 →
Method for Fabricating a Doped Polysilicon Feature in a Semiconductor Device
Patent: 6,107,169 →
Application: 09/134,526 →
Methods and Arrangements for Introducing Nitrogen into a Tunnel Oxide in a Non-Volatile Semiconductor Memory Device
Patent: 5,972,751 →
Application: 09/143,090 →
Methods for Forming Nitrogen-Rich Regions in a Floating Gate and Interpoly Dielectric Layer in a Non-Volatile Semiconductor Memory Device
Patent: 6,001,713 →
Application: 09/154,074 →
Self-Aligning Poly 1 Ono Dielectric for Non-Volatile Memory
Patent: 6,242,773 →
Application: 09/163,310 →
Viable Memory Cell Formed Using Rapid Thermal Annealing
Patent: 6,251,717 →
Application: 09/163,315 →
Method of Forming a Composite Interpoly Gate Dielectric
Patent: 6,163,049 →
Application: 09/170,061 →
Process for Fabricating a Common Source Region in Memory Devices
Patent: 6,211,020 →
Application: 09/177,294 →
Non-Volatile Semiconductor Memory Device Including Assymetrically Nitrogen Doped Gate Oxide
Patent: 6,252,276 →
Application: 09/377,183 →
Semiconductor Isolation Process to Minimize Weak Oxide Problems
Patent: 6,309,949 →
Application: 09/440,934 →
Fully Recessed Semiconductor Method for Low Power Applications with Single Wrap Around Buried Drain Region
Patent: 6,225,161 →
Application: 09/470,568 →
Methods and Arrangements for Forming a Floating Gate in Non-Volatile Memory Semiconductor Devices
Patent: 6,274,433 →
Application: 09/476,121 →
Multipurpose graded silicon oxynitride cap layer
Patent: 6,306,758 →
Application: 09/567,534 →
Fully recessed semiconductor method for low power applications
Patent: 6,344,393 →
Application: 09/620,339 →
Trenched Gate Non-Volatile Semiconductor Method with the Source/Drain Regions Spaced from the Trench by Sidewall Dopings
Patent: 6,764,904 →
Application: 09/629,780 →
A Trenched Gate Non-Volatile Semiconductor Device and Method for Low Power Applications with Corner Doping and Sidewall Doping
Patent: 6,303,437 →
Application: 09/632,536 →
Source Bus Formation for a Flash Memory Using Silicide
Patent: 6,579,778 →
Application: 09/634,991 →
Method of Forming a Composite Interpoly Gate Dielectric
Patent: 6,413,820 →
Application: 09/725,843 →
Publication: US 2001/0015456
Methods for Forming Nitrogen-Rich Regions in Non-Volatile Semiconductor Memory Devices
Patent: 6,989,319 →
Application: 10/718,707 →
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 19, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019028/0623 →
Security Agreement Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Release of Security Interest Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036019/0156 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036019/0518 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0001 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0473 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0625 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036031/0355 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036031/0691 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036034/0230 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0682 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0196 →
Assignment of Assignor's Interest Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0001 →
Assignment of Assignor's Interest Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036036/0490 →
Partial Release of Security Interest in Patents Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
Assignment of Assignor's Interest Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →