Patent Assignment
Reel/Frame 023828/0001
Assignment of Assignor's Interest
Recorded: 2010-01-13
Received: 2010-01-13
Pages: 398
Assignor
INFINEON TECHNOLOGIES AG
Executed: 2006-04-25
Assignee
QIMONDA AG
GUSTAV-HEINEMANN-RING 212, MUNICH, DEX, 81739, GERMANY
Covered Properties
(100)
Dual Parity Raid Wherein No More Than N+1 Data Symbols Contribute to Any Parity Symbol
Application:
12/534,533 →
Transparent Request Routing for a Partitioned Application Service
Application:
12/487,851 →
Method for Maintaining Track Data Integrity in Magnetic Disk Storage Devices
Application:
12/284,021 →
Optical Wavelength Selective Router
Application:
12/066,249 →
Storage Area Network with Target Side Recognition and Routing Table Upload
Application:
12/215,194 →
Optical Devices with Integral Isolators
Application:
12/048,373 →
Single-Pole Optical Wavelength Selector
Application:
11/914,946 →
Collimator Array
Application:
11/882,459 →
Single-Pole Optical Wavelength Selector
Application:
10/580,832 →
Optical Devices with Cascaded Liquid Crystal Elements
Application:
10/556,307 →
Dynamic Optical Phase Shifter Compensator
Application:
10/556,308 →
Distributed Snapshot Process
Application:
11/585,363 →
High Performance Tcp for Systems with Infrequent Ack
Application:
11/194,130 →
Adiabatic Rotational Switching Memory Element Including a Ferromagnetic Decoupling Layer
Application:
11/117,713 →
Wavelength Selective Optical Switch
Application:
10/492,484 →
Method for Maintaining Track Data Integrity in Magnetic Disk Storage Devices
Application:
10/841,258 →
Client Load Distribution
Application:
10/762,985 →
Storage Systems Having Differentiated Storage Pools
Application:
10/761,884 →
Distributed Snapshot Process
Application:
10/761,893 →
Fiber Optical Gain Equalizer
Application:
10/760,107 →
Fiber Optical Attenuator
Application:
10/657,743 →
Narrow Band Tunable Filter with Integrated Detector
Application:
10/453,455 →
Method for Producing a Semiconductor Wafer, Semiconductor Chip, and Intermediate Semiconductor Product
Application:
10/402,811 →
Liquid Crystal Optical Processing Systems
Application:
10/394,400 →
Multi-Pixel Liquid Crystal Cell Array
Application:
10/391,510 →
Liquid Crystal Variable Optical Attenuator
Application:
10/379,384 →
Method for Fabricating a Memory Cell
Application:
10/377,350 →
Liquid Crystal Cell Platform
Application:
10/371,235 →
Thermal Control System for Liquid Crystal Cell
Application:
10/371,983 →
Fabrication Method for Liquid Crystal Cell
Application:
10/371,976 →
Method for Fabricating a Component, and Component Having a Metal Layer and an Insulation Layer
Application:
10/370,858 →
Method for Checking an Integrated Electrical Circuit
Application:
10/368,334 →
Adaptive Storage Block Data Distribution
Application:
10/347,898 →
Short-Cut Response for Distributed Services
Application:
10/347,901 →
Integrated Test Circuit
Application:
10/317,933 →
Electronic Component with at Least One Semiconductor Chip and Method for Producing the Electronic Component
Application:
10/236,895 →
Transparent Request Routing for a Partitioned Application Service
Application:
10/217,118 →
Method of Analyzing an Integrated Electric Circuit, Computer Program Utilizing the Method, Data Carrier Including the Method, and Method for Downloading the Program
Application:
10/215,453 →
Electronic Component with a Semiconductor Chip and Method for Producing the Electronic Component
Application:
10/205,081 →
Integrated Semiconductor Circuit Having Contact Points and Configuration Having at Least Two Such Circuits
Application:
10/200,933 →
Test Method and Test Device for Electronic Memories
Application:
10/195,598 →
Method of Producing Conductive or Semiconducting Structured Polymers
Application:
10/191,995 →
A Semiconductor Chip Configuration with a Layer Sequence with Functional Elements Contacted by Contact Pads
Application:
10/187,766 →
Method for Checking a Conductive Connection Between Contact Points
Application:
10/185,629 →
Method for Assessing the Quality of a Memory Unit
Application:
10/185,282 →
Composition and Process for the Production of a Porous Layer Using the Composition
Application:
10/180,438 →
Method for Preparing Air Channel-Equipped Film for Use in Vacuum Package
Application:
10/169,485 →
Integrated Memory Having a Memory Cell Array with a Plurality of Segments and Method for Operating the Integrated Memory
Application:
10/166,962 →
Method for Producing Scatter Lines in Mask Structures for Fabricating Integrated Electrical Circuits
Application:
10/165,911 →
Semiconductor Chip, Memory Module and Method for Testing the Semiconductor Chip
Application:
10/159,848 →
Antireflective, Layer-Forming Composition, Layer Configuration Containing the Antireflective Layer, and Process for Producing the Antireflective Layer
Application:
10/154,297 →
Method for Fabricating an Integrated Semiconductor Circuit Having a Strongly Polarizable Dielectric or Ferroelectric
Application:
10/154,340 →
Semiconductor Memory and Method for Operating the Semiconductor Memory
Application:
10/154,597 →
Integrated Semiconductor Circuit Having Transistors That Are Switched with Different Frequencies
Application:
10/146,582 →
Semiconductor Memory Cell and Semiconductor Component as Well as Manufacturing Methods Therefore
Application:
10/140,393 →
Method for the Hybrid-Automated Monitoring of Production Machines
Application:
10/139,166 →
Production Machine with Capability of Transmitting Production Information and Method for Generating Events Regarding Production Information While Operating the Production Machine
Application:
10/139,167 →
Light Guide Configuration for Serial Bi-Directional Signal Transmission, Optical Circuit Board, and Fabrication Method
Application:
10/138,655 →
Sheet-Like Electrooptical Component, Light-Guide Configuration for Serial, Bidirectional Signal Transmission and Optical Printed Circuit Board
Application:
10/137,906 →
Method for Structuring a Photoresist Layer
Application:
10/134,888 →
Semiconductor Device and Production Process
Application:
10/133,336 →
Photoresist Compound and Method for Structuring a Photoresist Layer
Application:
10/133,620 →
Semiconductor Memory Cell and Method of Fabricating a Semiconductor Memory Cell
Application:
10/133,337 →
Stress-reduced layer system for use in storage capacitors
Application:
10/131,358 →
Tunable Optical Filter
Application:
10/120,562 →
Method of Fabricating a Patterned Metal-Containing Layer on a Semiconductor Wafer
Application:
10/122,936 →
Electronic Component with a Semiconductor Chip, and Method of Producing the Electronic Component
Application:
10/114,794 →
Configuration for Testing an Integrated Semiconductor Memory and Method for Testing the Memory
Application:
10/106,591 →
Memory Cell Fabrication Method and Memory Cell Configuration
Application:
10/093,722 →
Integrated Memory and Method for Testing and Repairing the Integrated Memory
Application:
10/091,076 →
Electronic Component with Stacked Semiconductor Chips
Application:
10/090,289 →
Integrated Semiconductor Memory Device
Application:
10/084,134 →
Method for Operating an Integrated Memory Unit Partitioned by an External Control Signal
Application:
10/082,556 →
Semiconductor Module with a Configuration for the Self-Test of a Plurality of Interface Circuits and Test Method
Application:
10/075,656 →
Method for Manufacturing a Semiconductor Circuit System
Application:
10/062,940 →
Method for Inspecting Defects on a Mask
Application:
10/060,450 →
Electronic Component with an Insulating Layer Formed from Fluorinated Norbornene Polymer and Method for Manufacturing the Insulating Layers
Application:
10/060,447 →
Method for Determining the Temperature of a Memory Cell from Threshold Voltage Semiconductor Component
Application:
10/060,445 →
Electronic Component with a Semiconductor Chip and Method of Producing the Electronic Component
Application:
10/056,356 →
Semiconductor Component for Connection to a Test System
Application:
10/055,522 →
Integrated Memory with Memory Cell Array
Application:
10/054,195 →
Integrated Memory Having a Plurality of Memory Cell Arrays and Method for Operating the Integrated Memory
Application:
10/054,613 →
Method and Circuit Configuration for Identifying an Operating Property of an Integrated Circuit
Application:
10/053,983 →
Electronic Component with Stacked Semiconductor Chips and Method of Producing the Component
Application:
10/047,028 →
Reaction Chamber for Processing a Substrate Wafer, and Method for Operating the Chamber
Application:
10/047,814 →
Integrated Semiconductor Memory Configuration
Application:
10/036,034 →
Process for the Deposition of Thin Layers by Chemical Vapor Deposition
Application:
10/034,053 →
Integrated Circuit Having a Data Processing Unit and a Buffer Memory
Application:
10/034,070 →
Circuit Configuration for Controlling Write and Read Operations in a Magnetoresistive Memory Configuration
Application:
10/023,155 →
Device and Method for Reducing the Number of Addresses of Faulty Memory Cells
Application:
10/016,863 →
Integrated Memory Having a Cell Array and Charge Equalization Devices, and Method for the Accelerated Writing of a Datum to the Integrated Memory
Application:
10/015,829 →
Measuring Device for Testing Unpacked Chips
Application:
10/005,977 →
Method for Outputting Data and Circuit Configuration with Driver Circuit
Application:
10/005,944 →
Method and Circuit Configuration for Controlling a Data Driver
Application:
09/998,723 →
Circuit Configuration and Method for Synchronization
Application:
09/998,725 →
Integrated Magnetoresistive Semiconductor Memory and Fabrication Method for the Memory
Application:
09/997,983 →
Random Access Memory with Hidden Bits
Application:
09/996,260 →
Method for Fabricating an Integrated Semiconductor Product
Application:
09/995,210 →
Process for Producing a Capacitor Configuration
Application:
09/995,209 →
Ferroelectric Memory Configuration and a Method for Producing the Configuration
Application:
10/034,931 →