Patent Assignment
Reel/Frame 035375/0233
Assignment of Assignor's Interest
Recorded: 2015-04-06
Pages: 20
Assignor
ADVANTEST (SINGAPORE) PTE. LTD.
Executed: 2015-04-01
Assignee
ADVANTEST CORPORATION
SHIN-MARUNOUCHI CENTER BUILDING, 1-6-2 MARUNOUCHI,, TOKYO, 100-0005, JAPAN
Covered Properties
(45)
Diagnostic Information Capture from Memory Devices with Built-in Self Test
Application:
11/535,974 →
Publication:
US 2008/0077836
Wafer Boat for Semiconductor Testing
Computing Device for Enabling Concurrent Testing
Leg Protective Shields for Treating Wounds of an Animal
Patent:
8,393,303 →
Application:
13/267,806 →
Emo Linkage Simplification
Apparatus and Method for Combining Electrical or Electronic Components, Apparatus and Method for Providing a Combination Information, Apparatus and Method for Determining a Sequence of Combinations and Computer Program
Application:
13/380,493 →
Optimized Automated Test Equipment Multi-Path Receiver Concept
Adjustable Gain Amplifier, Automated Test Equipment and Method for Adjusting a Gain of an Amplifier
Application:
13/392,492 →
Publication:
US 2012/0206150
Apparatus and Method for Wireless Testing of a Plurality of Transmit Paths and a Plurality of Receive Paths of an Electronic Device
Apparatus Comprising a Recursive Delayer and Method for Measuring a Phase Noise
Test Device and Test Method for Measuring a Phase Noise of a Test Signal
Method and Apparatus for Scheduling a Use of Test Resources of a Test Arrangement for the Execution of Test Groups
Application:
13/516,696 →
Publication:
US 2013/0006567
Method and Apparatus for Testing a Device-Under-Test
Transmit/Receive Unit, and Methods and Apparatus for Transmitting Signals Between Transmit/Receive Units
Application:
13/585,706 →
Publication:
US 2015/0015284
Method and Automatic Test Equipment for Performing a Plurality of Tests of a Device Under Test
Apparatus and Method for Source Synchronous Testing of Signal Coverters
Apparatus and Method for Testing a Plurality of Devices Under Test
Pseudo Tester-Per-Site Functionality on Natively Tester-Per-Pin Automatic Test Equipment for Semiconductor Test
Apparatus for Determining a Number of Successive Equal Bits Preceding an Edge Within a Bit Stream and Apparatus for Reconstructing a Repetitive Bit Sequence
Solution for Full Speed, Parallel Dut Testing
Electrical Double Filter Structure
Electrical Filter Structure
Test Electronics to Device Under Test Interfaces, and Methods and Apparatus Using Same
Application:
13/742,183 →
Publication:
US 2013/0135002
Bit Sequence Generator and Apparatus for Calculating a Sub-Rate Transition Matrix and a Sub-Rate Initial State for a State Machine of a Plurality of State Machines
Test Apparatus for Generating Reference Scan Chain Test Data and Test System
System, Methods and Apparatus Using Virtual Appliances in a Semiconductor Test Environment
Systems, Methods and Apparatus That Employ Statistical Analysis of Structural Test Information to Identify Yield Loss Mechanisms
Application:
13/822,625 →
Publication:
US 2017/0220706
Stiffener Plate for a Probecard and Method
Tester Having an Application Specific Electronics Module, and Systems and Methods That Incorporate or Use the Same
Power Supply Noise Reduction Circuit and Power Supply Noise Reduction Method
Calibration Module for a Tester and Tester
Test Card for Testing One or More Devices Under Test and Tester
Methods, Apparatus, and Systems for Contacting Semiconductor Dies That Are Electrically Coupled to Test Access Interface Positioned in Scribe Lines of a Wafer
Method and Apparatus for Improving Differential Direct Current (Dc) Measurement Accuracy
Online Design Validation for Electronic Devices
Adaptive Value Capture for Process Monitoring
Automatic Test Equipment
Application:
14/259,043 →
Publication:
US 2014/0229782
Techniques for Determining a Fault Probability of a Location on a Chip
Fast Semantic Processor for Per-Pin Apg
Reconfigurable Automatic Test Circuit Techniques
Application:
14/341,766 →
Publication:
US 2014/0336974
Method and System for Spectral Leakage Removal in Dac Testing
Device Under Test Data Processing Techniques
Variable Attenuator
Fast Pattern Multiplexing
Application:
62/029,975 →
Thermal Overlaod Detection and Recovery Circuit
Application:
62/034,679 →
Related Assignments
(8)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Feb 17, 2010
From: KHOCHE, AJAY; HILLIGES, KLAUS-DIETER
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 023948/0769 →
Assignment of Assignor's Interest
Mar 22, 2011
From: RIVERA TREVINO, GUSTAVO JAVIER; TREVINO, MICHAEL G; JONES, KELLY
To: QUALCOMM INCORPORATED; VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 025998/0658 →
Assignment of Assignor's Interest
Jun 16, 2014
From: MOON, GERALD; LEVENTHAL, IRA; LARSON, RON; KARAMCHANDANI, SANGEET
To: ADVANTEST (SINGAPORE) PTE. LTD.
Reel/Frame 033112/0690 →
Corrective Assignment to Correct the Spelling of Second Inventor Previously Recorded at Reel: 025998 Frame: 0658. Assignor(S) Hereby Confirms the Assignment.
Jul 28, 2014
From: RIVERA TREVINO, GUSTAVO JAVIER; BACK, MICHAEL G; JONES, KELLY
To: QUALCOMM INCORPORATED; VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 033429/0198 →
Corrective Assignment to Correct the Assignee's Address Previously Recorded at Reel: 035375 Frame: 0233. Assignor(S) Hereby Confirms the Assignment.
Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035444/0018 →
Assignment of Assignor's Interest
Jun 26, 2017
From: RIVOIR, JOCHEN; ROTTACKER, MARKUS; HANTSCH, ANDREAS
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 042992/0998 →
Assignment of Assignor's Interest
Jun 26, 2017
From: RIVOIR, JOCHEN; ROTTACKER, MARKUS; HANTSCH, ANDREAS
To: ADVANTEST CORPORATION
Reel/Frame 042992/0965 →
Change of Address
Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →