IP Library Assignment 037302/0661
Patent Assignment
Reel/Frame 037302/0661

Merger and Change of Name

Recorded: 2015-12-16 Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties (100)
Catalog Phone Sales Terminal
Patent: 7,133,836 →
Application: 08/655,136 →
Mechanism for Dynamically Constructing Customized Implementations to Enforce Restrictions
Patent: 7,131,008 →
Application: 09/483,724 →
Method and Apparatus for Caching Native Code in a Virtual Machine Interpreter
Patent: 7,124,407 →
Application: 09/641,035 →
Shared Decoder
Patent: 7,133,408 →
Application: 09/687,562 →
Method and Apparatus for Creating and Deploying Applications from a Server Application
Patent: 7,139,821 →
Application: 09/693,355 →
Noise Margin Self-Diagnostic Receiver Logic
Patent: 7,130,340 →
Application: 09/698,622 →
Development of Manifest for Java Embedded Server Bundle
Patent: 7,131,111 →
Application: 09/766,209 →
Publication: US 2002/0099845
Method and Apparatus for Simultaneous Optimization of Code Targeting Multiple Machines
Patent: 7,140,010 →
Application: 09/823,207 →
Publication: US 2002/0144247
Method and System for Managing High-Availability-Aware Components in a Networked Computer System
Patent: 7,143,167 →
Application: 09/846,380 →
Publication: US 2001/0054095
Method and System for Grouping Entries in a Directory Server by Group Memberships Defined by Roles
Patent: 7,130,839 →
Application: 09/867,790 →
Publication: US 2003/0105742
Methods and Apparatus for Managing Defunct Processes
Patent: 7,124,403 →
Application: 09/930,807 →
Publication: US 2003/0037290
Interactive Software Engineering Tool with Support for Embedded Lexical Contexts
Patent: 7,127,704 →
Application: 09/940,242 →
Publication: US 2002/0100016
Mechanism for Facilitating Invocation of a Service
Patent: 7,130,898 →
Application: 09/940,280 →
Publication: US 2003/0055875
Aggressive Prefetch of Address Chains
Patent: 7,137,111 →
Application: 09/996,088 →
Publication: US 2003/0105942
Method and Apparatus for Determining Class Dependencies of Objects and/or Classes
Patent: 7,137,112 →
Application: 09/996,126 →
Publication: US 2003/0037320
Short Path Search Using Tiles and Piecewise Linear Cost Propagation
Patent: 7,139,992 →
Application: 09/998,559 →
Publication: US 2002/0107711
Component Upgrading with Dependency Conflict Resolution, Knowledge Based and Rules
Patent: 7,140,013 →
Application: 10/013,307 →
Publication: US 2004/0015946
Method, System, and Program for Configuring System Resources
Patent: 7,133,907 →
Application: 10/041,883 →
Publication: US 2003/0093501
System and Method for Coordinating Access to Data for a Distributed Application
Patent: 7,130,905 →
Application: 10/043,809 →
Publication: US 2003/0131041
Peer-To-Peer Resource Resolution
Patent: 7,136,927 →
Application: 10/055,741 →
Publication: US 2002/0147810
Support Interface Module Bug Submitter
Patent: 7,143,313 →
Application: 10/066,170 →
Publication: US 2004/0093405
Device Drivers Configured to Monitor Device Status
Patent: 7,137,039 →
Application: 10/075,140 →
Publication: US 2002/0138791
Secured Peer-to-Peer Network Data Exchange
Patent: 7,127,613 →
Application: 10/082,385 →
Publication: US 2003/0163697
Method and Apparatus for Generating a Code Bridge
Patent: 7,131,110 →
Application: 10/103,407 →
Publication: US 2003/0182457
System and Method for Testing Telematics Software
Patent: 7,146,307 →
Application: 10/104,243 →
Publication: US 2003/0182577
Java Telematics Emulator
Patent: 7,127,386 →
Application: 10/104,294 →
Publication: US 2003/0182099
Source Synchronous Bus Repeater
Patent: 7,139,308 →
Application: 10/117,427 →
Publication: US 2003/0189973
System and Method for Dynamic Cluster Adjustment to Node Failures in a Distributed Data System
Patent: 7,139,925 →
Application: 10/134,782 →
Publication: US 2003/0204786
Remote Execution Model for Distributed Application Launch and Control
Patent: 7,130,881 →
Application: 10/137,031 →
Publication: US 2003/0208528
Method and Apparatus for Providing Fault-Tolerance for Temporary Results Within a Cpu
Patent: 7,124,331 →
Application: 10/146,102 →
Publication: US 2004/0078728
Inter Java Virtual Machine (Jvm) Resource Locking Mechanism
Patent: 7,131,120 →
Application: 10/150,181 →
Publication: US 2003/0217092
System and Method for Delivering Fpga Programming
Patent: 7,127,601 →
Application: 10/159,232 →
Publication: US 2003/0225942
Method and System for Generating Button and Tab User Interface Control Components Within the Context of a Hypertext Markup Language (Html) Based Web Page
Patent: 7,134,083 →
Application: 10/198,217 →
Method and Apparatus for Zero-Copy Receive Buffer Management
Patent: 7,142,540 →
Application: 10/198,923 →
Publication: US 2004/0013117
System and Method for Forward Chaining Web-Based Procedure Calls
Patent: 7,136,895 →
Application: 10/205,108 →
Publication: US 2004/0019678
Method, System, and Program for Discovering Components Within a Network
Patent: 7,143,615 →
Application: 10/209,544 →
Publication: US 2004/0024863
Strategic Technology Architecture Roadmap
Patent: 7,143,420 →
Application: 10/230,591 →
Publication: US 2004/0045014
Reorganizing Data in Log Files for Data Tracking Management
Patent: 7,139,744 →
Application: 10/255,900 →
Publication: US 2004/0059707
Memory-Efficient Metadata Organization in a Storage Array
Patent: 7,127,465 →
Application: 10/261,545 →
Publication: US 2004/0064463
Method and System for Managing Documents Modified While Being Viewed in a Browser Window
Patent: 7,137,072 →
Application: 10/271,568 →
Publication: US 2003/0088831
System and Method for Appending Server-Side Glossary Definitions to Transient Web Content in a Networked Computing Environment
Patent: 7,143,133 →
Application: 10/286,580 →
Publication: US 2004/0088351
Method and Apparatus for Fixing Bit Errors Encountered During Cache References Without Blocking
Patent: 7,127,643 →
Application: 10/288,941 →
Publication: US 2003/0093726
System and Method for Measuring Code Segment Performance
Patent: 7,143,396 →
Application: 10/288,967 →
Publication: US 2004/0088699
On-Chip Measurement of Signal State Duration
Patent: 7,131,034 →
Application: 10/292,329 →
Publication: US 2004/0093535
Request Queue Management
Patent: 7,146,233 →
Application: 10/301,497 →
Publication: US 2003/0126265
System and Method of Applying Power Laws in Optimizing Network Traffic
Patent: 7,127,504 →
Application: 10/302,314 →
Publication: US 2004/0103187
Method and Mechanism for Finding References in a Card in Time Linear in the Size of the Card in a Garbage-Collected Heap
Patent: 7,136,887 →
Application: 10/309,503 →
Publication: US 2004/0111445
Detection of Dead Regions During Incremental Collection
Patent: 7,143,124 →
Application: 10/313,878 →
Publication: US 2004/0111451
System and Method for Interconnecting Nodes of a Redundant Computer System
Patent: 7,131,028 →
Application: 10/317,520 →
Publication: US 2004/0153695
Magnified Texture-Mapped Pixel Performance in a Single-Pixel Pipeline
Patent: 7,145,570 →
Application: 10/317,599 →
Publication: US 2003/0169271
Web Simulator
Patent: 7,143,025 →
Application: 10/319,062 →
Publication: US 2004/0117170
System and Method for Providing a Flexible Framework for Remote Heterogeneous Server Management and Control
Patent: 7,140,014 →
Application: 10/325,228 →
Publication: US 2004/0122924
General Techniques for Diagnosing Data Corruptions
Patent: 7,133,883 →
Application: 10/329,077 →
Publication: US 2004/0133539
Method and Apparatus for Performing Error Correction Code (Ecc) Conversion
Patent: 7,137,057 →
Application: 10/337,580 →
Publication: US 2004/0133836
Method and Apparatus for Dynamically Allocating Registers in a Windowed Architecture
Patent: 7,127,592 →
Application: 10/338,548 →
Publication: US 2004/0133766
Generating Standalone Midlets from a Testing Harness
Patent: 7,143,310 →
Application: 10/347,748 →
Publication: US 2004/0153774
Method and Apparatus for Prefetching Memory Pages During Execution of a Computer Program
Patent: 7,143,399 →
Application: 10/354,331 →
Publication: US 2004/0148593
Multiply Execution Unit for Performing Integer and Xor Multiplication
Patent: 7,139,787 →
Application: 10/354,354 →
Publication: US 2004/0153489
Adaptive Throttling
Patent: 7,124,321 →
Application: 10/361,468 →
Publication: US 2004/0158771
Capturing System Error Messages
Patent: 7,124,328 →
Application: 10/365,680 →
Publication: US 2004/0078695
Technique for Incorporating Power Information in Register Transfer Logic Design
Patent: 7,146,303 →
Application: 10/376,753 →
Publication: US 2004/0172232
Method and Apparatus for Supplying Power in Electronic Equipment
Patent: 7,139,920 →
Application: 10/387,784 →
Publication: US 2004/0181698
Delay Compensation for Synchronous Processing Sets
Patent: 7,124,319 →
Application: 10/389,444 →
Publication: US 2003/0182594
Method, System, and Article of Manufacture for Fault Determination
Patent: 7,131,032 →
Application: 10/389,642 →
Publication: US 2004/0181709
Sample Replication Mode with Depth Value Calculation
Patent: 7,129,941 →
Application: 10/392,283 →
Publication: US 2004/0183795
Mixed Signal Delay Locked Loop Characterization Engine
Patent: 7,136,799 →
Application: 10/394,789 →
Publication: US 2004/0183578
Test System Including a Test Circuit Board Including Resistive Devices
Patent: 7,131,047 →
Application: 10/408,705 →
Publication: US 2004/0199844
Method and Apparatus for Disabling Defective Components in a Computer System
Patent: 7,137,020 →
Application: 10/412,998 →
Publication: US 2003/0217256
Method and System for Storing Field Replaceable Unit Repair History Information
Patent: 7,131,030 →
Application: 10/413,325 →
Publication: US 2004/0153686
Method and Apparatus for Accelerated Post-Silicon Testing and Random Number Generation
Patent: 7,133,818 →
Application: 10/417,765 →
Publication: US 2004/0210431
Method and Apparatus for Efficiently Performing a Square Root Operation
Patent: 7,139,786 →
Application: 10/436,610 →
Publication: US 2004/0230630
A Method for Generating a Synchronization Signal Based on the Clock Ratio Between Two Clock Domains for Data Transfer Between the Domains
Patent: 7,134,035 →
Application: 10/452,247 →
Publication: US 2004/0243869
Method and Apparatus for Enhancing the Speed of a Synchronous Bus
Patent: 7,143,304 →
Application: 10/452,678 →
Publication: US 2004/0243876
Configuration Description Language Value Management Method and System
Patent: 7,143,400 →
Application: 10/458,086 →
Publication: US 2005/0034110
Computer System Implementing Synchronized Broadcast Using Skew Control and Queuing
Patent: 7,136,980 →
Application: 10/610,447 →
Publication: US 2004/0111564
On-Chip Testing of Embedded Memories Using Address Space Identifier Bus in Sparc Architectures
Patent: 7,127,640 →
Application: 10/611,467 →
Publication: US 2005/0015671
Method and Apparatus for Memory Redundancy and Recovery from Uncorrectable Errors
Patent: 7,139,942 →
Application: 10/624,829 →
Publication: US 2005/0022078
Method and Apparatus to Restore Data Redundancy and Utilize Spare Storage Spaces
Patent: 7,130,973 →
Application: 10/637,416 →
Utility for Configuring and Verifying Data Sources
Patent: 7,134,008 →
Application: 10/655,247 →
Publication: US 2005/0066155
Indicator Feedback Mechanism
Patent: 7,129,851 →
Application: 10/673,696 →
Method and Apparatus for Determining Transistor Sizes
Patent: 7,127,687 →
Application: 10/684,637 →
Method and Apparatus for a Distributed Clock Generator
Patent: 7,126,405 →
Application: 10/726,853 →
Publication: US 2004/0108876
Processor Core Clock Generation Circuits
Patent: 7,134,036 →
Application: 10/735,104 →
Multiple Level Transistor Abstraction for Dynamic Circuits
Patent: 7,134,105 →
Application: 10/747,013 →
Publication: US 2005/0125185
Compensation Technique to Mitigate Aging Effects in Integrated Circuit Components
Patent: 7,129,800 →
Application: 10/771,989 →
Publication: US 2005/0168255
Storage System Including Hierarchical Cache Metadata
Patent: 7,130,956 →
Application: 10/775,426 →
Publication: US 2005/0177687
Storage System Structure for Storing Relational Cache Metadata
Patent: 7,130,957 →
Application: 10/775,432 →
Publication: US 2005/0177672
Hierarchical Repeater Insertion
Patent: 7,137,091 →
Application: 10/778,639 →
Off-Pitch Column Redundancy Using Dynamic Shifters
Patent: 7,134,057 →
Application: 10/778,916 →
Method and Apparatus for Selecting a Desired Application on a Smart Card
Patent: 7,140,549 →
Application: 10/786,895 →
Publication: US 2005/0184165
Method and Apparatus for Routing Differential Signals Across a Semiconductor Chip
Patent: 7,139,993 →
Application: 10/810,284 →
Publication: US 2005/0216876
Request Arbitration in Multi-Core Processor
Patent: 7,133,950 →
Application: 10/855,060 →
Publication: US 2005/0060457
Constraint-Based Global Router for Routing High Performance Designs
Patent: 7,137,097 →
Application: 10/877,259 →
Method and System for Determining Whether a Person Is Potentially Unavailable for Communication
Patent: 7,129,818 →
Application: 10/892,989 →
Efficient Method of Data Transfer Between Register Files and Memories
Patent: 7,136,308 →
Application: 10/979,345 →
Publication: US 2006/0092710
Method and Apparatus for Processing Data Using Objects
Patent: 7,130,773 →
Application: 11/000,575 →
Sense Amplifier Thermal Correction Scheme
Patent: 7,136,774 →
Application: 11/051,116 →
Publication: US 2005/0127980
High Density Memory and Multiplexer Control Circuit for Use Therein
Patent: 7,145,810 →
Application: 11/069,674 →
Method and Apparatus for Generating a Reference Signal
Patent: 7,129,774 →
Application: 11/126,585 →
Attofarad Capacitance Measurement
Patent: 7,129,712 →
Application: 11/256,733 →
Related Assignments (1)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 20, 2006
From: ADUVA, INC.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 018535/0236 →