IP Library Assignment 037406/0200
Patent Assignment
Reel/Frame 037406/0200

Merger

Recorded: 2015-12-30 Pages: 12
Assignor
APROLASE DEVELOPMENT CO., LLC
Executed: 2015-08-26
Assignee
NYTELL SOFTWARE LLC
2711 CENTERVILLE RD, SUITE 400, WILMINGTON, DELAWARE, 19808
Covered Properties (63)
Multiplexer Circuitry for High Density Analog Signals
Patent: 4,490,626 →
Application: 06/403,004 →
Multiplexer Circuitry for High Density Analog Signals
Patent: 33,331 →
Application: 07/336,017 →
Sensing and Selecting Observed Events for Signal Processing
Patent: 5,635,705 →
Application: 08/526,415 →
Stackable Layers Containing Encapsulated Ic Chips
Patent: 5,953,588 →
Application: 08/777,747 →
Stacking Layers Containing Enclosed Ic Chips
Patent: 6,195,268 →
Application: 09/031,435 →
Ic Stack Utilizing Secondary Leadframes
Patent: 6,028,352 →
Application: 09/095,415 →
Ic Stack Utilizing Bga Contacts
Patent: 6,014,316 →
Application: 09/095,416 →
Multi- Element Micro Gyro
Patent: 5,955,668 →
Application: 09/166,458 →
Multi-Element Micro Gyro
Patent: 6,089,089 →
Application: 09/301,847 →
Stack of Equal Layer Neo-Chips Containing Encapsulated Ic Chips of Different Sizes
Patent: 6,072,234 →
Application: 09/316,740 →
Method of Prducing a High Quality, High Resolution Image from a Sequence of Low Quality, Low Resolution Images That Are Undersampled and Subject to Jitter
Patent: 6,650,704 →
Application: 09/427,384 →
Multi-Axis Micro Gyro Structure
Patent: 6,578,420 →
Application: 09/604,782 →
Method of Canceling Quadrature Error in an Angular Rate Sensor
Patent: 6,370,937 →
Application: 09/812,147 →
Publication: US 2001/0039834
Mems Sensor with Single Central Anchor and Motion-Limiting Connection Geometry
Patent: 6,513,380 →
Application: 09/884,880 →
Publication: US 2002/0189352
Method of Designing a Flexure System for Tuning the Modal Response of a Decoupled Micromachined Gyroscope and a Gyroscoped Designed According to the Method
Patent: 6,715,352 →
Application: 09/893,329 →
Publication: US 2003/0000305
Retro-Reflector Warm Stop for Uncooled Thermal Imaging Cameras and Method of Using the Same
Patent: 6,596,997 →
Application: 09/921,525 →
Publication: US 2003/0025083
Method of Making Stackable Layers Containing Encapsulated Integrated Circuit Chips with One or More Overlaying Interconnect Layers
Patent: 6,797,537 →
Application: 09/938,686 →
Publication: US 2003/0080419
Multilayer Modules with Flexible Substrates
Patent: 6,734,370 →
Application: 09/948,950 →
Publication: US 2003/0047353
Stack of Multilayer Modules with Heat-Focussing Metal Layer
Patent: 6,560,109 →
Application: 09/949,024 →
Publication: US 2003/0048609
Stacking of Multilayer Modules
Patent: 6,717,061 →
Application: 09/949,512 →
Publication: US 2003/0049424
High Speed Multi-Stage Switching Network Formed from Stacked Switching Layers
Patent: 6,829,237 →
Application: 09/973,857 →
Publication: US 2002/0159449
Highly Configuarable Capacitive Transducer Interface Circuit
Patent: 6,731,121 →
Application: 10/110,889 →
Method and Apparatus for Connecting Vertically Stacked Integrated Circuit Chips
Patent: 6,806,559 →
Application: 10/128,728 →
Publication: US 2003/0197253
Stackable Microcircuit Layer Formed from a Plastic Encapsulated Microcircuit and Method of Making the Same
Patent: 6,706,971 →
Application: 10/142,557 →
Publication: US 2002/0126459
Video event capture, storage and processing method and apparatus
Patent: 8,934,627 →
Application: 10/178,390 →
Publication: US 2003/0009773
Stackable Layers Containing Encapsulated Integrated Circuit Chips with One or More Overlying Interconnect Layers and a Method of Making the Same
Patent: 6,784,547 →
Application: 10/302,680 →
Publication: US 2003/0127735
Method for Effectively Embedding Various Integrated Circuits Within Field Programmable Gate Arrays
Patent: 7,082,591 →
Application: 10/346,363 →
Publication: US 2004/0040005
Field Programmable Gate Array with a Variably Wide Word Width Memory
Patent: 6,856,167 →
Application: 10/347,038 →
Publication: US 2003/0223295
Stackable Layers Containing Ball Grid Array Packages
Patent: 6,967,411 →
Application: 10/360,244 →
Publication: US 2004/0004286
Multilayer Modules with Flexible Substrates
Patent: 7,127,807 →
Application: 10/431,914 →
Publication: US 2004/0040743
Neo-Wafer Device and Method
Patent: 7,417,323 →
Application: 10/703,177 →
Publication: US 2004/0147064
Three-Dimensional Module Comprised of Layers Containing Ic Chips with Overlying Interconnect Layers
Patent: 7,239,012 →
Application: 10/951,990 →
Publication: US 2005/0037540
High Speed Switching Module Comprised of Stacked Layers Incorporating T-Connect Structures
Patent: 7,440,449 →
Application: 10/960,712 →
Publication: US 2005/0058128
Vertically Stacked Pre-Packaged Integrated Circuit Chips
Patent: 7,872,339 →
Application: 10/968,572 →
Publication: US 2005/0077621
Field Programmable Gate Array Incorporating Dedicated Memory Stacks
Patent: 7,265,579 →
Application: 11/037,490 →
Publication: US 2005/0122758
Bga-Scale Stacks Comprised of Layers Containing Integrated Circuit Die and a Method for Making the Same
Patent: 7,511,369 →
Application: 11/062,507 →
Publication: US 2007/0158805
Stackable Semiconductor Chip Layer Comprising Prefabricated Trench Interconnect Vias
Patent: 7,786,562 →
Application: 11/150,712 →
Publication: US 2005/0277288
Method for Precision Integrated Circuit Die Singulation Using Differential Etch Rates
Patent: 7,335,576 →
Application: 11/197,828 →
Publication: US 2006/0079072
Stackable Layer Containing Ball Grid Array Package
Patent: 7,242,082 →
Application: 11/229,351 →
Publication: US 2006/0055039
Anti-Tamper Module
Patent: 8,074,082 →
Application: 11/248,659 →
Publication: US 2006/0087883
Method for Making a Neo-Layer Comprising Embedded Discrete Components
Patent: 7,198,965 →
Application: 11/354,370 →
Publication: US 2006/0134835
Low Power Electronic Circuit Incorporating Real Time Clock
Patent: 7,516,339 →
Application: 11/415,891 →
Publication: US 2007/0074056
Global Positioning Using Planetary Constants
Patent: 7,822,549 →
Application: 11/429,468 →
Publication: US 2010/0211351
Stackable Tier Structure Comprising Prefabricated High Density Feedthrough
Patent: 7,768,113 →
Application: 11/441,908 →
Publication: US 2006/0267213
Mems Cooling Device
Patent: 7,823,403 →
Application: 11/511,117 →
Publication: US 2007/0048154
Tier Structure with Tier Frame Having a Feedthrough Structure
Patent: 7,919,844 →
Application: 11/524,090 →
Publication: US 2007/0035033
Absolute Pressure Sensor
Patent: 7,380,459 →
Application: 11/654,292 →
Three-Dimensional Ladar Module with Alignment Reference Insert Circuitry
Patent: 7,436,494 →
Application: 11/706,724 →
Ball Grid Array Stack
Patent: 7,990,727 →
Application: 11/731,154 →
Large Format Thermoelectric Infrared Detector and Method of Fabrication
Patent: 7,755,048 →
Application: 11/807,671 →
Publication: US 2010/0031992
Field Programmable Gate Array Utilizing Dedicated Memory Stacks in a Vertical Layer Format
Patent: 7,649,386 →
Application: 11/897,938 →
Publication: US 2008/0074144
Wire Bond Method for Angularly Disposed Conductive Pads and a Device Made from the Method
Patent: 7,772,045 →
Application: 11/977,447 →
Chip Scale Vacuum Pump
Patent: 8,485,793 →
Application: 12/283,746 →
Three-Dimensional Ladar Module with Alignment Reference Insert Circuitry Comprising High Density Interconnect Structure
Patent: 8,198,576 →
Application: 12/287,691 →
Publication: US 2009/0079956
Forced Vibration Piezo Generator and Piezo Actuator
Patent: 8,040,022 →
Application: 12/334,383 →
Publication: US 2009/0167114
Stackable Layer Containing Ball Grid Array Package
Patent: 43,536 →
Application: 12/500,434 →
Three-Dimensional Ladar Module with Alignment Reference Insert Circuitry
Patent: 43,722 →
Application: 12/607,253 →
Field Programmable Gate Array Utilizing Dedicated Memory Stacks in a Vertical Layer Format
Patent: 7,902,879 →
Application: 12/639,625 →
Publication: US 2010/0148822
Stacked Ball Grid Array Package Module Utilizing One or More Interposer Layers
Patent: 8,299,594 →
Application: 12/696,185 →
Publication: US 2010/0140777
Method for Precision Integrated Circuit Die Singulation Using Differential Etch Rates
Patent: 43,877 →
Application: 12/712,810 →
Stackable Layer Containing Ball Grid Array Package
Patent: 7,982,300 →
Application: 12/731,970 →
Publication: US 2010/0181662
Vertically Stacked Pre-Packaged Integrated Circuit Chips
Patent: 8,012,803 →
Application: 12/891,439 →
Publication: US 2011/0045635
Stackable Layer Containing Ball Grid Array Package
Patent: 8,835,218 →
Application: 13/181,221 →
Publication: US 2011/0269270
Related Assignments (8)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 4, 2020
From: INTELLECTUAL VENTURES ASSETS 158 LLC
To: HANGER SOLUTIONS, LLC
Reel/Frame 051486/0425 →
Assignment of Assignor's Interest Feb 2, 2020
From: NYTELL SOFTWARE LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0173 →
Assignment of Assignor's Interest May 11, 2020
From: NYTELL SOFTWARE LLC
To: INTELLECTUAL VENTURES ASSETS 134 LLC
Reel/Frame 052623/0482 →
Assignment of Assignor's Interest Oct 22, 2020
From: NAKANISHI, TATSURO; TSURUMI, RISA; OHASHI, TAKASHI; ISHIHARA, YOSHIYUKI
To: TOCHIGI PREFECTURE
Reel/Frame 054142/0121 →
Assignment of Assignor's Interest Feb 17, 2021
From: INTELLECTUAL VENTURES ASSETS 134 LLC
To: PINEAPPLE34, LLC
Reel/Frame 055280/0878 →
Assignment of Assignor's Interest Feb 12, 2023
From: NYTELL SOFTWARE LLC
To: INTELLECTUAL VENTURES ASSETS 186 LLC
Reel/Frame 062708/0535 →
Security Interest Mar 24, 2023
From: MIND FUSION, LLC
To: INTELLECTUAL VENTURES ASSETS 191 LLC; INTELLECTUAL VENTURES ASSETS 186 LLC
Reel/Frame 063295/0001 →
Assignment of Assignor's Interest Jul 13, 2023
From: INTELLECTUAL VENTURES ASSETS 186 LLC
To: MIND FUSION, LLC
Reel/Frame 064271/0001 →