Method and apparatus for extending storage functionality at the bios level
View Patent ↗A method and apparatus for implementing RAID through control of the IO channels on the motherboard is provided. One exemplary method locates IO channels on a motherboard. Next, the IO channels on the motherboard are controlled where the IO channels are configured to communicate with a storage media. Then the storage media associated with the IO channels is managed as a RAID. Some notable advantages of the discussed methods and apparatuses include the simplicity of implementing the host based RAID through existing infrastructure contained within a computing system. Additionally, the added benefits of improving reliability and system performance associated with a RAID subsystem are made available in a cost effective manner because most of already existing infrastructure.
1. An apparatus for implementing a host based RAID, comprising:
a central processing unit (CPU);
a communication chip, the communication chip containing native input/output (I/O) channels, the native IO channels being configured to carry interrupts, the communication chip in communication with the CPU over a single bus;
a storage media, the storage media being accessed through the communication chip;
a system basic input output system (BIOS), the system BIOS including a read only memory storing code configured to enable control of the native IO channels to manage the storage media associated with the native IO channels in a redundant array of inexpensive disk (RAID) implementation directly through the CPU; and
the single bus connecting the CPU, the BIOS and the communication chip.
2. The apparatus as recited in claim 1 , wherein the storage media is a plurality of hard drives.
3. The apparatus as recited in claim 1 , wherein the communication chip is one of a SCSI chip and an ATA chip.
4. The apparatus as recited in claim 1 , wherein the RAID implementation is any one of disk mirroring, bit by bit parity and disk striping.
5. The apparatus as recited in claim 1 , wherein the bus is one of a PCI bus, an ISA bus and an EISA bus.
6. An apparatus for implementing a host based RAID, comprising:
a central processing unit (CPU);
a communication chip, the communication chip containing native input/output (IO) channels;
a plurality of storage devices, the plurality of storage devices being accessed through the communication chip;
a system basic input output system (BIOS);
a RAID IO channel capture read only memory (ROM) chip having an input/output processor (IOP), the ROM chip being configured to execute I/O channel identification and capture code, the code enabling control of the native IO channels to manage the plurality of storage devices associated with the native IO channels in a RAID implementation directly through the ROM chip; and
a single bus interconnecting the CPU, the system BIOS, the ROM chip and the communication chip, wherein the communication chip is configured to issue interrupts directly to the CPU over the single bus.
7. The apparatus as recited in claim 6 wherein the storage devices are hard drives.
8. The apparatus as recited in claim 6 , wherein the communication chip is one of a SCSI chip and an ATA chip.
9. The apparatus as recited in claim 6 , wherein the RAID environment is any one of disk mirroring, bit by bit parity and disk striping.
10. The apparatus as recited in claim 6 , wherein the bus is one of a PCI bus, an ISA bus and an EISA bus.
11. An apparatus for implementing a host based RAID, comprising:
a central processing unit (CPU);
a communication chip, the communication chip containing input/output IO channels;
a storage media, the storage media being accessed through the IO channels of the communication chip;
a basic input output system (BIOS);
a plug-in card, the plug-in card accommodating a read only memory (ROM) chip having an input/output processor (IOP), the ROM chip being configured to execute I/O channel identification and capture code enabling control of the IO channels to manage the storage media associated with the IO channels in a RAID environment directly through the ROM chip; and
a single bus connecting the CPU, the BIOS, the plug-in card and the communication chip, wherein the communication chip is configured to issue interrupts directly to the CPU over the single bus.
12. The apparatus as recited in claim 11 , wherein the plug-in card is an Adaptec Host Adapter (AHA) card.
13. The apparatus as recited in claim 11 , wherein the plug-in card contains at least one communication chip.
14. The apparatus as recited in claim 13 , wherein the communication chip is connected to a storage media.
15. The apparatus as recited in claim 14 , wherein the storage media is a plurality of hard drives.
16. The apparatus as recited in claim 11 , wherein the RAID environment is any one of disk mirroring, bit by bit parity and disk striping.