Method and apparatus for minimizing option ROM BIOS code
View Patent ↗A method for configuring a Redundant Array of Inexpensive Disks (RAID) host adapter card is provided. The RAID host adapter card includes a flash storage chip and a RAID input/output processor (IOP). The RAID host adapter card is coupled to a peripheral connection interface (PCI) bus of a computer system and is interconnected to at least one storage container. The computer system has a system memory. The method includes booting the computer system and passing control to the RAID IOP. The RAID IOP reads the flash storage chip to execute a fraction of code previously written to the flash storage chip. The RAID IOP further communicates to the hard drive to locate a main portion of code previously written to at least one hidden sector. The RAID IOP also loads the main portion of the code to the system memory of the computer system to enable interoperability of the host adapter card with the computer system.
1. A method for configuring a Redundant Array of Inexpensive Disks (RAID) host adapter card, the RAID host adapter card including a flash storage chip and a RAID input/output processor (IOP), the RAID host adapter card being coupled to a peripheral connection interface (PCI) bus of a computer system and interconnected to at least one hard drive, the computer system having a system memory, the method comprising:
booting the computer system; and
passing control to the RAID IOP, the RAID IOP performing,
reading the flash storage chip to execute a fraction of a code component, the fraction of the code component being previously written to the flash storage chip;
communicating to the hard drive to locate a main portion of the code component, the main portion of the code component being previously written to a hidden region; and
loading the main portion of the code component to the system memory of the computer system.
2. A method as recited in claim 1 , wherein the fraction of the code component is configured to have instructions to cause communication with the at least one hard drive to locate the main portion of the code component.
3. A method as recited in claim 1 , wherein a size of the code component is configured to range between about 0.5 Megabyte (MB) and about 4 MBs.
4. A method as recited in claim 1 , wherein a size of the code component is about 0.5 MB.
5. A method as recited in claim 4 , wherein a size of the fraction of the code component is about 20 KB.
6. A method as recited in claim 1 , wherein the code component is an extensible firmware interface (EFI).
7. A method for configuring a Redundant Array of Inexpensive Disks (RAID) host adapter card, the RAID host adapter card including a flash storage chip and a RAID input/output processor (IOP), the RAID host adapter card being coupled to a peripheral connection interface (PCI) bus of a computer system and interconnected to at least one storage container, the computer system having system memory, the method comprising:
booting the computer system; and
passing control to the RAID IOP, the RAID IOP performing,
reading the flash storage chip to execute a fraction of a code component, the fraction of the code component being previously written to the flash storage chip;
communicating to the a hard drive to locate a main portion of the code component, the main portion of the code component being previously written to at least one hidden sector; and
loading the main portion of the code component to the system memory of the computer system to enable interoperability of the host adapter card with the computer system.
8. A method as recited in claim 7 , wherein the fraction of the code component is configured to have instructions to cause communication with the at least one storage container to locate the main portion of the code component.
9. A method as recited in claim 7 , wherein the code component is an option Read Only Memory (ROM) Basic Input Output System (BIOS) code.
10. A method as recited in claim 7 , wherein the code component is an IA32/IA64 option ROM BIOS code.
11. A method as recited in claim 7 , wherein the storage container includes at least one hard drive.
12. A method as recited in claim 7 , wherein the flash chip is configured to include a firmware.
13. A host adapter card for enabling a computer system to have operation of a Redundant Array of Inexpensive Disks (RAID), the host adapter card comprising:
a flash storage chip; and
a RAID input/output processor (IOP), the host adapter card being coupled to a peripheral connection interface (PCI) bus of the computer system and interconnected to at least one hard drive; the RAID IOP being configured to read the flash storage chip to execute a fraction of an option Read Only Memory (ROM) Basic Input Output System (BIOS) code, the fraction of the option ROM BIOS code being previously written to the flash storage chip, the fraction of the option ROM BIOS code having instructions to cause communication with the at least one hard drive to locate a main portion of the option ROM BIOS code, the main portion of the option ROM BIOS code being previously written to at least one hidden sector on the at least one hard drive, the RAID IOP being further configured to copy the main portion of the option ROM BIOS code to system memory of the computer system to enable proper interoperability between the computer system and the host adapter card operating with option ROM BIOS code.
14. A host adapter card as recited in claim 13 , wherein the flash storage chip has a limited memory size.
15. A host adapter card as recited in claim 13 , wherein a size of the option ROM BIOS code is configured to range between about 0.5 Megabyte (MB) and about 4 MBs.
16. A host adapter card as recited in claim 13 , wherein a size of the option ROM BIOS code is configured to be about 0.5 MB.
17. A host adapter card as recited in claim 16 , wherein the size of the fraction of the option ROM BIOS code is configured to be about 20 KB.
18. A host adapter card as recited in claim 13 , wherein the option ROM BIOS code is an extensible firmware interface (EFI).
19. A method for configuring a computer system to operate with a host adapter card, the host adapter card having a flash memory chip that has a limited memory size, the host adapter card being in communication with a hard drive of the computer system, the method comprising:
booting the computer system;
reading the flash memory chip to execute tag code of a code component resident in the flash memory, the tag code having instructions to cause communication with the hard drive to locate hidden code of the code component on the hard drive; and
loading the hidden code from the hard drive to system memory of the computer system to enable interoperability of the host adapter card and the computer system.
20. A method as recited in claim 19 , wherein reading the flash memory chip to execute the tag code is performed by the system Basic Input Output System (BIOS).
21. A method as recited in claim 19 , wherein the flash memory chip includes a firmware.
22. A method as recited in claim 19 , wherein the hidden code is previously written to at least one hidden sector of the hard drive.
23. A method for configuring a Redundant Array of Inexpensive Disks (RAID) host adapter card, the RAID host adapter card including a flash storage chip and a RAID input/output processor (IOP), the RAID host adapter card being coupled to a peripheral connection interface (PCI) bus of a computer system and interconnected to at least one hard drive, the computer system having a system memory, the method comprising:
booting the computer system; and
passing control to the RAID IOP, the RAID IOP performing,
reading the flash storage chip to execute a fraction of an option Read Only Memory (ROM) Basic Input Output System (BIOS) code, the fraction of the option ROM BIOS code being previously written to the flash storage chip;
communicating to the hard drive to locate a main portion of the option ROM BIOS code, the main portion of the option ROM BIOS code being previously written to a hidden region; and
loading the main portion of the option ROM BIOS code to the system memory of the computer system.
24. A method as recited in claim 23 , wherein the fraction of the option ROM BIOS code is configured to have instructions to cause communication with the at least one hard drive to locate the main portion of the option ROM BIOS code.
25. A method as recited in claim 23 , wherein the option ROM BIOS code is an extensible firmware interface (EFI).