Method for the manufacture of printed circuit boards with plated resistors
View Patent ↗A process is revealed whereby resistors can be manufactured integral with a printed circuit board by plating the resistors onto the insulative substrate. Uniformization of the insulative substrate through etching and oxidation of the plated resistor are discussed as techniques for improving the uniformity and consistency of the plated resistors. Trimming and baking are also disclosed as methods for adjusting and stabilizing the resistance of the plated resistors.
1. A printed circuit board comprising metal circuits upon and separated by a polymer based substrate wherein the metal circuits are connected at specific points by resistive material which has a volume resistivity of from about 500 to about 1×10−4 ohm-cm, which resistive material has been selectively plated upon the polymer based substrate to form resistors and then subsequently baked, and wherein at least portions of the resistive material have been trimmed from the polymer based substrate such that each resistor independently has an insulation resistance equal to a predetermined amount of ohms.
2. A printed circuit according to claim 1 , wherein the resistive material has been subjected to chemical oxidation, after being plated.
3. A printed circuit according to claim 1 , wherein the resistive material is selected from the group consisting of electroless nickel-phosphorous, electroless palladium-phosphorous, electroless ruthenium-phosphorous, and alloys of any of the foregoing.
4. A printed circuit according to claim 1 , wherein the trimming is accomplished by contacting at least portions of the resistive material with laser light such that at least portions of the resistive material are ablated or otherwise removed by such contact.
5. A printed circuit according to claim 3 , wherein the resistive material is selected from the group consisting of electroless nickel-phosphorous with a phosphorous content in the plated resistive material of at least 10% by weight and electroless palladium-phosphorous with a phosphorous content in the plated resistive material of at least 2% by weight.