IP Library Granted Patent US 8,188,590
Granted Patent B2
US 8,188,590 · App. 11/843,649 · Granted May 29, 2012

Integrated circuit package system with post-passivation interconnection and integration

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Quick Facts
Patent No.
US 8,188,590
App. No.
11/843,649
Granted
May 29, 2012
Kind
B2
Abstract

An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a second layer on the first layer, and forming bump pads on and in the second layer, the bump pads connected to ends of the bridge.

Claims (36)

1. A method for manufacturing an integrated circuit package system comprising:

providing an integrated circuit die with a bond pad;

forming a passivation layer over the integrated circuit die;

forming a first metal layer over the passivation layer to form a bridge directly on the passivation layer;

forming an insulation layer on the passivation layer, the insulation layer having openings provided therein; and

forming a second metal layer including a redistribution layer between the bond pad and the bridge over the insulation layer, the second metal layer having separate portions, each separate portion connected to the bridge and directly on or in the insulation layer by the openings provided in the insulation layer.

2. The method as claimed in claim 1 wherein:

providing the integrated circuit die provides the integrated circuit die with adjacent bond pads; and

forming the first metal layer includes forming another bridge connected at ends thereof to the adjacent bond pads.

3. The method as claimed in claim 1 wherein:

providing the integrated circuit die provides the integrated circuit die with integral adjacent bond pads;

forming the passivation layer provides openings therein exposing the integral adjacent bond pads;

forming the first metal layer forms separate contacts connected to the integral adjacent bond pads; and

forming the second metal layer forms separate circuit components respectively connected to the separate contacts through openings in the insulation layer.

4. The method as claimed in claim 1 wherein forming the second metal layer forms a separate portion as a circuit component.

5. The method as claimed in claim 1 further comprising:

forming the second metal layer includes forming a bump pad; and

connecting a solder ball on top of the bump pad.

6. An integrated circuit package system comprising:

an integrated circuit die with a bond pad;

a passivation layer over the integrated circuit die;

a first metal layer over the passivation layer including a bridge directly on the passivation layer;

an insulation layer on the passivation layer, the insulation layer having openings provided therein; and

a second metal layer including a redistribution layer between the bond pad and the bridge over the insulation layer, the second metal layer having separate portions, each separate portion connected to the bridge and directly on or in the insulation layer.

7. The system as claimed in claim 6 wherein:

the integrated circuit die provides the integrated circuit die with adjacent bond pads; and

the first metal layer includes another bridge connected at ends thereof to one of the adjacent bond pads.

8. The system as claimed in claim 6 wherein:

the integrated circuit die provides the integrated circuit die with integral adjacent bond pads;

the passivation layer provides openings therein exposing the integral adjacent bond pads;

the first metal layer is formed into separate contacts with the separate contacts connected to the integral adjacent bond pads; and

the second metal layer is formed into separate circuit components respectively connected to the separate contacts through openings in the insulation layer.

9. The system as claimed in claim 6 wherein the second metal layer has a separate portion in the form of a circuit component.

10. The system as claimed in claim 6 wherein:

the second metal layer has a separate portion in the form of a bump pad; and

a solder ball is on top of the bump pad.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 8, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038388/0036 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2007
From: LIN, YAOJIAN; MARIMUTHU, PANDI CHELVAM
To: STATS CHIPPAC LTD.
Reel/Frame 019735/0411 →