IP Library Granted Patent US 8,189,344
Granted Patent B2
US 8,189,344 · App. 12/136,037 · Granted May 29, 2012

Integrated circuit package system for stackable devices

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Quick Facts
Patent No.
US 8,189,344
App. No.
12/136,037
Granted
May 29, 2012
Kind
B2
Abstract

An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

Claims (36)

1. A method for manufacturing an integrated circuit package system comprising:

providing a package substrate;

mounting an interposer chip containing active circuitry over the package substrate;

attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip;

attaching a stack connector to the conductive bump stack and the package substrate; and

applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

2. The method as claimed in claim 1 further comprising providing an integrated circuit module having the interposer chip thereover.

3. The method as claimed in claim 1 wherein attaching the stack connector includes connecting the stack connector to the conductive bump stack and the package substrate.

4. The method as claimed in claim 1 further comprising connecting an external device on the stud bump end.

5. A method for manufacturing an integrated circuit package system comprising:

providing a package substrate having a component side;

mounting an interposer chip containing active circuitry and having a chip bond pad adjacent an active chip surface over the package substrate;

attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip;

attaching a stack connector to the conductive bump stack and the component side of the package substrate; and

applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant.

6. The method as claimed in claim 5 further comprising providing an integrated circuit module on the package substrate having the interposer chip thereover.

7. The method as claimed in claim 5 wherein attaching the stack connector includes connecting the stack connector to the package substrate and the chip bond pad without the conductive bump stack.

8. The method as claimed in claim 5 wherein attaching the stack connector includes connecting the stack connector to the package substrate and the chip bond pad with the conductive bump stack.

9. The method as claimed in claim 5 further comprising connecting an external device having external connectors on the stud bump end of the conductive bump stack.

10. An integrated circuit package system comprising:

a package substrate;

an interposer chip containing active circuitry mounted over the package substrate;

a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip;

a stack connector attached to the conductive bump stack and the package substrate; and

a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

11. The system as claimed in claim 10 further comprising an integrated circuit module having the interposer chip thereover.

12. The system as claimed in claim 10 wherein the stack connector is connected to the conductive bump stack and the package substrate.

13. The system as claimed in claim 10 further comprising an external device connected on the stud bump end.

14. The system as claimed in claim 10 wherein:

the interposer chip containing active circuitry has a chip bond pad adjacent an active chip surface;

the stack connector is attached to a component side of the package substrate; and

the package encapsulant is over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant.

15. The system as claimed in claim 14 further comprising an integrated circuit module on the package substrate having the interposer chip thereover.

16. The system as claimed in claim 14 wherein the stack connector is connected to the package substrate and the chip bond pad without the conductive bump stack.

17. The system as claimed in claim 14 wherein the stack connector is connected to the chip bond pad adjacent the conductive bump stack and the package substrate.

18. The system as claimed in claim 14 further comprising an external device having an external connector connected on the stud bump end of the conductive bump stack.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →
RELEASE OF SECURITY INTEREST Recorded Jun 8, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052864/0057 →
CHANGE OF NAME Recorded Apr 8, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038388/0036 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2008
From: LEE, SANG-HO; PARK, SOO-SAN; CHOI, DAESIK
To: STATS CHIPPAC LTD.
Reel/Frame 021068/0630 →