IP Library Granted Patent US 8,345,779
Granted Patent B2
US 8,345,779 · App. 12/416,363 · Granted Jan 1, 2013

Pulse transformer driver

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Quick Facts
Patent No.
US 8,345,779
App. No.
12/416,363
Granted
Jan 1, 2013
Kind
B2
Abstract

Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.

Claims (55)

1. A system for communicating pulse information, the system comprising:

a transmission module, configured to:

receive an input pulse from an input source, the input pulse having an input pulse width; and

generate a driver signal as a function of the input pulse, the driver signal being generated asynchronously with respect to the input source; and

a receiving module, in operative communication with the transmission module via a transmission medium, and configured to:

receive a three-level signal via the transmission medium as a function of the driver signal, the three-level signal comprising a first received pulse corresponding to a beginning of the input pulse and transitioning between a first level and a second level, and a second received pulse corresponding to an end of the input pulse and transitioning between the first level and a third level; and

generate an output pulse as a function of the three-level signal, the output pulse having an output pulse width that is substantially equal to the input pulse width, and

wherein:

the transmission medium has a primary end having a first side and a second side;

the driver signal comprises a buffered signal and a delayed buffered signal; and

the transmission module is further configured to drive the first side of the primary end with the buffered signal and drive the second side of the primary end with the delayed buffered signal, such that the primary side of the transmission medium is driven differentially by the transmission module.

2. The system of claim 1 , wherein:

the input pulse width is larger than a predetermined minimum pulse width; and

each of the first received pulse and the second received pulse has a pulse width that is shorter than the minimum pulse width.

3. The system of claim 1 ,

wherein the delayed buffer signal is delayed from the buffered signal by a duration determined as a function of the input pulse width.

4. The system of claim 1 ,

wherein the receiving module comprises a hysteresis comparator.

5. The system of claim 4 ,

wherein the hysteresis comparator comprises two inputs and one of the two inputs is coupled with a reference level.

6. The system of claim 1 , wherein the transmission medium is selected from a group consisting of:

a pulse transformer;

a small-signal pulse transformer;

a power pulse transformer;

a coaxial cable;

a twisted wire pair;

a transmission line; and

a bus.

7. The system of claim 6 , wherein:

the transmission medium has a primary end coupled with a first reference level and a secondary end coupled with a second reference level; and

the transmission medium is operable to provide an isolation boundary between the first reference level and the second reference level.

8. The system of claim 7 , wherein:

the first reference level is a chassis ground and the second reference level is a floating ground.

9. A method for communicating pulse information, the method comprising:

receiving an input pulse from an input source, the input pulse having an input pulse width;

generating a driver signal as a function of the input pulse and asynchronously with respect to the input source, the driver signal comprising a first driver pulse and a second driver pulse, the second driver pulse following the first driver pulse by a duration determined as a function of the input pulse width;

communicating the driver signal over a transmission medium;

receiving a three-level signal via the transmission medium, the three-level signal being functionally related to the driver signal such that the three-level signal comprises a first received pulse corresponding to the first driver pulse and a second received pulse corresponding to the second driver pulse, wherein the first received pulse transitions between a first level and a second level and the second received signal transitions between the first level and a third level; and

generating an output pulse as a function of the three-level signal, the output pulse having an output pulse width that is substantially equal to the input pulse width,

wherein:

the driver signal is a two-level signal, and

communicating the driver signal over the transmission medium comprises driving a first end of the transmission medium differentially with the driver signal such that the transmission medium produces the three-level signal at a second end of the transmission medium.

10. The method of claim 9 , wherein generating the driver signal comprises:

generating a delayed input pulse by applying a magnitude of delay to the input pulse;

detecting a start time of the input pulse and an end time of the input pulse;

detecting a start time of the delayed input pulse and an end time of the delayed input pulse;

generating the first driver pulse so that the first driver pulse begins substantially at the start time of the input pulse and ends substantially as the start time of the delayed input pulse;

generating the second driver pulse so that the second driver pulse begins substantially at the end time of the input pulse and ends substantially as the end time of the delayed input pulse.

11. The method of claim 9 , wherein:

the second level of the three-level signal is greater than the first level of the three-level signal and the third level of the three-level signal is less than the first level of the three-level signal.

12. The method of claim 11 , wherein generating an output pulse as a function of the three-level signal comprises:

comparing the three-level signal with a first threshold value and a second threshold value, the first threshold level being greater than the first level of the three-level signal and less than the second level of the three-level signal, and the second threshold level being less than the first level of the three-level signal and greater than the third level of the three-level signal;

when the three-level signal crosses the first threshold level in a positive direction, transitioning an output signal from a first output level to a second output level; and

when the three-level signal crosses the first threshold level in a negative direction, returning the output signal from the second output level to the first output level,

wherein transitioning the output signal from the first output level to the second output level and returning the output signal from the second output level to the first output level forms the output pulse.

Assignments (19)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
SUPPLEMENTAL PATENT SECURITY AGREEMENT Recorded Nov 11, 2011
From: MICROSEMI CORPORATION; MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP; MICROSEMI CORP. - MASSACHUSETTS; ACTEL CORPORATION
To: MORGAN STANLEY & CO. LLC
Reel/Frame 027213/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2011
From: ASIC ADVANTAGE INC.
To: MICROSEMI CORPORATION
Reel/Frame 027096/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2009
From: OCHI, SAM SEIICHIRO; COLEMAN, CHARLES
To: ASIC ADVANTAGE INC.
Reel/Frame 022536/0686 →