Integrated circuit system with recessed through silicon via pads and method of manufacture thereof
View Patent ↗A method of manufacture of an integrated circuit system includes: providing a substrate with a face surface having a via therein and a back surface having a trench therein; filling the via with a conductive pillar; forming a recessed contact pad in the trench; filling the recessed contact pad partially with solder; and forming an under-bump metal having a base surface in electrical contact with the conductive pillar, and having sides that extend away from the face surface of the substrate and further extend beyond the base surface.
1. A method of manufacturing an integrated circuit system comprising:
providing a substrate with a face surface having a via therein and a back surface having a trench therein;
filling the via with a conductive pillar;
forming a recessed contact pad in the trench;
filling the recessed contact pad partially with solder; and
forming an under-bump metal having a base surface in electrical contact with the conductive pillar, and having sides that extend away from the face surface of the substrate and further extend beyond the base surface.
2. The method as claimed in claim 1 further comprising:
forming an oxidation layer between the conductive pillar and the substrate and between the recessed contact pad and the substrate.
3. The method as claimed in claim 1 further comprising:
forming a wiring layer near the face surface of the substrate and electrically connected to the conductive pillar.
4. The method as claimed in claim 1 wherein:
providing the substrate includes providing an integrated circuit.
5. The method as claimed in claim 1 further comprising:
mounting an integrated circuit to the back surface of the substrate, the integrated circuit having a conductive post mounted within the recessed contact pad and having the solder surrounding a portion of the conductive post above a top level of the recessed contact pad.
6. A method of manufacture of an integrated circuit system comprising:
providing a substrate with a face surface having a via therein and a back surface having a trench therein;
filling the via with a conductive pillar;
forming a recessed contact pad in the trench;
filling the recessed contact pad partially with solder;
forming an under-bump metal having a base surface in electrical contact with the conductive pillar, and having sides that extend away from the face surface of the substrate and further extend beyond the base surface; and
forming a solder bump, a conductive post, or a combination thereof in direct contact with the under-bump metal.
7. The method as claimed in claim 6 wherein:
forming the conductive post includes the conductive post having a width that is substantially similar to a width of the under-bump metal.
8. The method as claimed in claim 6 wherein:
forming the conductive post having a width that is less than an inner width of the recessed contact pad.
9. The method as claimed in claim 6 further comprising:
forming a passivation layer having a top surface near the face surface of the substrate; and
forming a top flange as part of the under-bump metal in direct contact with the top surface of the passivation layer and the top flange is over the passivation layer.
10. The method as claimed in claim 6 further comprising:
mounting a through silicon via die, a flip-chip, or a combination thereof to the back surface of the substrate and electrically connected within recessed contact pad.
11. An integrated circuit system comprising:
a substrate with a face surface having a via therein and a back surface having a trench therein;
a conductive pillar within the via;
a recessed contact pad within the trench;
solder that partially fills the recessed contact pad; and
an under-bump metal having a base surface in electrical contact with the conductive pillar, and having a side that extends beyond and extends away from the face surface of the substrate and further extends beyond the base surface.
12. The system as claimed in claim 11 further comprising:
an oxidation layer between the conductive pillar and the substrate and between the recessed contact pad and the substrate.
13. The system as claimed in claim 11 further comprising:
a wiring layer near the face surface of the substrate and electrically connected to the conductive pillar.
14. The system as claimed in claim 11 further comprising:
the substrate is an integrated circuit.
15. The system as claimed in claim 11 further comprising:
an integrated circuit mounted to the back surface of the substrate, the integrated circuit having a conductive post mounted within the recessed contact pad and having the solder surrounding a portion of the conductive post above a top level of the recessed contact pad.
16. The system as claimed in claim 11 further comprising
a solder bump, a conductive post, or a combination thereof formed in direct contact with the under-bump metal.
17. The system as claimed in claim 16 wherein:
the conductive post has a width that is substantially similar to a width of the under-bump metal.
18. The system as claimed in claim 16 wherein:
the conductive post has a width that is less than an inner width of the recessed contact pad.
19. The system as claimed in claim 16 further comprising:
a passivation layer having a top surface near the face surface of the substrate; and
a top flange of the under-bump metal in direct contact with the top surface of the passivation layer and the top flange is over the passivation layer.
20. The system as claimed in claim 16 further comprising:
a through silicon via die, a flip-chip, or a combination thereof mounted to the back surface of the substrate and electrically connected within recessed contact pad.