Granted Patent B2

US 8,502,391 · App. 13/314,984 · Granted Aug 6, 2013

Abstract

Claims (58)

1. A method of making a semiconductor device, comprising:

providing a first carrier having a first resin disposed over the first carrier;

disposing a fabric over the first resin;

forming a second resin over the first resin and around the fabric to form an asymmetrical pre-impregnated (PPG) substrate;

removing the first carrier;

providing a second carrier;

forming a first conductive layer over the second carrier;

transferring the first conductive layer from the second carrier to the first resin; and

removing the second carrier.

2. The method of claim 1 , further including removing a portion of the first conductive layer before transferring the first conductive layer to the first resin.

3. The method of claim 1 , wherein the first conductive layer is formed over the second carrier in dual sided processing using interface layers.

4. The method of claim 1 , wherein the fabric includes one or more layers of phenolic cotton paper, woven glass, matte glass, or polyester with a thickness in a range of 25-50 micrometers.

5. The method of claim 1 , wherein the first conductive layer is oriented asymmetrically within the first and second resins such that the first conductive layer is offset with respect to the fabric to minimize warpage.

6. The method of claim 1 , further including:

forming a via through the second resin and fabric to expose the first conductive layer;

forming a second conductive layer in the via over the first conductive layer; and

mounting a semiconductor die to the first conductive layer.

7. A method of making a semiconductor device, comprising:

providing a first carrier having a first resin disposed over the first carrier;

disposing a fabric over the first resin;

forming a second resin over the first resin and around the fabric to form an asymmetrical pre-impregnated (PPG) substrate; and

disposing a first conductive layer within the first resin.

8. The method of claim 7 , further including removing a portion of the first conductive layer before disposing the first conductive layer within the first resin.

9. The method of claim 7 , wherein the first conductive layer is formed over a second carrier in dual sided processing using interface layers.

10. The method of claim 7 , wherein the fabric includes one or more layers of phenolic cotton paper, woven glass, matte glass, or polyester with a thickness in a range of 25-50 micrometers.

11. The method of claim 7 , wherein the first conductive layer is oriented asymmetrically within the first and second resins such that the first conductive layer is offset with respect to the fabric to minimize warpage.

12. The method of claim 7 , further including:

forming a via through the PPG substrate to expose the first conductive layer;

forming a second conductive layer in the via over the first conductive layer; and

mounting a semiconductor die to the first conductive layer.

13. A method of making a semiconductor device, comprising:

providing a pre-impregnated (PPG) substrate including an asymmetrically disposed fabric; and

disposing a first conductive layer within the PPG substrate and offset with respect to the fabric.

14. The method of claim 13 , wherein providing the PPG substrate includes:

providing a first carrier having a first resin disposed over the first carrier;

disposing the fabric over the first resin; and

forming a second resin over the first resin and around the fabric.

15. The method of claim 13 , further including removing a portion of the first conductive layer before disposing the first conductive layer within the PPG substrate.

16. The method of claim 13 , wherein the first conductive layer is formed over a second carrier in dual sided processing using interface layers.

17. The method of claim 13 , wherein the fabric includes one or more layers of phenolic cotton paper, woven glass, matte glass, or polyester with a thickness in a range of 25-50 micrometers.

18. The method of claim 13 , wherein the first conductive layer is oriented asymmetrically within the PPG substrate such that the first conductive layer is offset with respect to the fabric to minimize warpage.

19. The method of claim 13 , further including:

forming a via through the PPG substrate to expose the first conductive layer;

forming a second conductive layer in the via over the first conductive layer; and

mounting a semiconductor die to the first conductive layer.

20. A semiconductor device, comprising:

a first resin;

fabric disposed over the first resin;

a second resin formed over the first resin and around the fabric to form an asymmetrical pre-impregnated (PPG) substrate; and

a first conductive layer disposed within the first resin.

21. The semiconductor device of claim 20 , wherein the first conductive layer is patterned to reduce a volume of conductive material and reduce warpage of the PPG substrate.

22. The semiconductor device of claim 20 , wherein the first conductive layer is formed over the PPG substrate to form a single metal layer semiconductor substrate having a thickness of less than 60 micrometers.

23. The semiconductor device of claim 20 , wherein the fabric includes one or more layers of phenolic cotton paper, woven glass, matte glass, or polyester with a thickness in a range of 25-50 micrometers.

24. The semiconductor device of claim 20 , wherein the first conductive layer is offset with respect to the fabric to minimize warpage.

25. The semiconductor device of claim 20 , further including:

a via formed through the PPG substrate to expose the first conductive layer;

a second conductive layer formed in the via over the first conductive layer; and

a semiconductor die mounted to the first conductive layer.

Assignments (9)