IP Library Granted Patent US 8,980,691
Granted Patent B2
US 8,980,691 · App. 13/931,397 · Granted Mar 17, 2015

Semiconductor device and method of forming low profile 3D fan-out package

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Quick Facts
Patent No.
US 8,980,691
App. No.
13/931,397
Granted
Mar 17, 2015
Kind
B2
Abstract

A semiconductor device includes a substrate having an insulating layer and a conductive layer embedded in the insulating layer. The conductive layer is patterned to form conductive pads or conductive pillars. The substrate includes a first encapsulant formed over the conductive layer. A first opening is formed through insulating layer and first encapsulant using a stamping process or laser direct ablation. The substrate is separated into individual units, which are mounted to a carrier. A semiconductor die is disposed in the first opening in the substrate. A second encapsulant is deposited over the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and substrate. An opening is formed through the second encapsulant and through the insulating layer to expose the conductive layer. A bump is formed in the second opening over the conductive layer outside a footprint of the semiconductor die.

Claims (59)

1. A method of making a semiconductor device, comprising:

providing a substrate including a first insulating layer and a conductive layer embedded in the first insulating layer and a first opening extending completely through the substrate;

disposing a first semiconductor die within the first opening of the substrate;

depositing an encapsulant over the first semiconductor die and substrate; and

forming a second opening through the encapsulant and substrate extending to the conductive layer.

2. The method of claim 1 , further including forming an interconnect structure over the first semiconductor die and substrate.

3. The method of claim 1 , further including forming a bump within the second opening over the conductive layer.

4. The method of claim 1 , further including removing a portion of the first semiconductor die and encapsulant.

5. The method of claim 1 , wherein providing the substrate further includes:

forming a bump over the conductive layer; and

forming the first insulating layer over the conductive layer and the bump.

6. The method of claim 1 , further including disposing a second semiconductor die over the first semiconductor die.

7. A method of making a semiconductor device, comprising:

providing a substrate including a first insulating layer and a conductive layer;

forming a first opening through the substrate;

disposing a first semiconductor die within the first opening of the substrate; and

forming a second opening partially through the substrate extending to the conductive layer.

8. The method of claim 7 , further including forming an interconnect structure over the first semiconductor die and substrate.

9. The method of claim 7 , further including:

depositing an encapsulant over the first semiconductor die and substrate; and

forming the second opening through the encapsulant and substrate extending to the conductive layer.

10. The method of claim 7 , further including forming a bump within the second opening over the conductive layer.

11. The method of claim 7 , further including forming the first opening or second opening by stamping or laser direct ablation.

12. A semiconductor device, comprising:

a substrate including a first opening extending through the substrate;

a first semiconductor die disposed in the first opening of the substrate;

an encapsulant deposited over the first semiconductor die and substrate; and

a second opening formed through the encapsulant and partially through the substrate.

13. The semiconductor device of claim 12 , wherein the substrate further includes:

an insulating layer; and

a conductive layer embedded within the insulating layer.

14. The semiconductor device of claim 13 , wherein the conductive layer includes conductive pads or pillars having a pitch of 0.50 millimeters or less.

15. The semiconductor device of claim 12 , further including an interconnect structure formed over the first semiconductor die and substrate.

16. The semiconductor device of claim 12 , further including a bump formed in the second opening.

17. A semiconductor device, comprising:

a substrate including a first insulating layer and a conductive layer, wherein a first surface of the conductive layer and a second surface of the conductive layer opposite the first surface are devoid of the first insulating layer and a height of the conductive layer is less than a height of the first insulating layer; and

a first semiconductor die disposed adjacent to the substrate.

18. The semiconductor device of claim 17 , further including an interconnect structure formed over the first semiconductor die and substrate.

19. The semiconductor device of claim 17 , further including a bump formed in the second opening over the conductive layer.

20. The semiconductor device of claim 17 , further including an encapsulant deposited over the first semiconductor die and substrate.

21. The semiconductor device of claim 17 , further including a second semiconductor die disposed over the first semiconductor die.

22. The semiconductor device of claim 20 , wherein the second opening extends through the encapsulant and partially through the substrate.

23. The semiconductor device of claim 17 , further including a heat sink disposed over the first semiconductor die.

24. The semiconductor device of claim 17 , further including a second insulating layer formed over the first insulating layer.

25. The method of claim 1 , further including forming the first opening or second opening by stamping or laser direct ablation.

26. The method of claim 1 , further including forming a second insulating layer over the first insulating layer.

27. The method of claim 7 , further including forming a second insulating layer over the first insulating layer.

28. The method of claim 7 , further including disposing a second semiconductor die over the first semiconductor die.

29. The semiconductor device of claim 12 , further including a second semiconductor die disposed over the first semiconductor die.

30. A method of making a semiconductor device, comprising:

providing a plurality of substrate units each including an insulating layer and a conductive layer embedded in the insulating layer;

arranging the substrate units to form a space between the substrate units;

disposing a first semiconductor die in the space between the substrate units; and

forming an opening in the substrate units extending to the conductive layer.

31. The method of claim 30 , further including forming an interconnect structure over the first semiconductor die and substrate units.

32. The method of claim 30 , further including depositing an encapsulant over the first semiconductor die and substrate units.

33. The method of claim 32 , further including forming the opening through the encapsulant and substrate units extending to the conductive layer.

34. The method of claim 30 , further including forming a bump within the opening over the conductive layer.

35. The method of claim 30 , further including disposing a second semiconductor die over the first semiconductor die.

Assignments (8)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0145. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064806/0001 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0145 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2013
From: LIN, YAOJIAN
To: STATS CHIPPAC, LTD.
Reel/Frame 030723/0847 →