IP Library Granted Patent US 10,062,943
Granted Patent B2
US 10,062,943 · App. 15/261,879 · Granted Aug 28, 2018

Microstrip line structure and method for fabricating the same

Inventor: Tzung-Lin Li (Hsinchu, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01P3/082H01P3/08H01P11/003
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Quick Facts
Patent No.
US 10,062,943
App. No.
15/261,879
Granted
Aug 28, 2018
Kind
B2
Abstract

A method for fabricating microstrip line structure is disclosed. First, a substrate is provided, ground patterns are formed on the substrate, an interlayer dielectric (ILD) layer is formed on the ground patterns, contact plugs are formed in the ILD layer, a ground plate is formed on the ILD layer, and a signal line is formed on the ground plate. Preferably, the ground plate includes openings that are completely shielded by the ground patterns.

Claims (44)

1. A method for fabricating microstrip line structure, comprising:

providing a substrate;

forming ground patterns on the substrate;

forming a ground plate on the substrate, wherein the ground plate comprises openings shielded by the ground patterns and part of the ground patterns shielding the openings also overlapping part of the ground plate; and

forming a signal line above the ground plate.

2. The method of claim 1 , further comprising:

forming an interlayer dielectric (ILD) layer on the ground patterns;

forming contact plugs in the ILD layer;

forming the ground plate on the ILD layer and electrically connecting the ground plate to the ground patterns through the contact plugs.

3. The method of claim 2 , further comprising:

forming a dielectric layer on the ground plate; and

forming the signal line on the dielectric layer.

4. The method of claim 1 , further comprising:

forming an interlayer dielectric (ILD) layer on the substrate;

forming the ground plate on the ILD layer;

forming contact plugs on the ground plate; and

forming the ground patterns on the contact plugs to shield the openings of the ground plate.

5. The method of claim 4 , further comprising:

forming a dielectric layer on the ground patterns; and

forming the signal line on the dielectric layer.

6. The method of claim 1 , wherein the ground patterns comprise metal.

7. The method of claim 1 , wherein the ground patterns comprise polysilicon.

8. A microstrip line structure, comprising:

a substrate;

ground patterns on the substrate;

a ground plate on the substrate, wherein the ground plate comprises openings shielded by the ground patterns and part of the ground patterns shielding the openings also overlapping part of the ground plate; and

a signal line above the ground plate.

9. The microstrip line structure of claim 8 , further comprising:

an interlayer dielectric (ILD) layer on the ground patterns;

contact plugs in the ILD layer;

the ground plate on the ILD layer and the ground plate being electrically connected to the ground patterns through the contact plugs.

10. The microstrip line structure of claim 9 , further comprising:

a dielectric layer on the ground plate; and

the signal line on the dielectric layer.

11. The microstrip line structure of claim 8 , further comprising:

an interlayer dielectric (ILD) layer on the substrate;

the ground plate on the ILD layer;

contact plugs on the ground plate; and

the ground patterns on the contact plugs to shield the openings of the ground plate.

12. The microstrip line structure of claim 11 , further comprising:

a dielectric layer on the ground patterns; and

the signal line on the dielectric layer.

13. The microstrip line structure of claim 8 , wherein the ground patterns comprise metal.

14. The microstrip line structure of claim 8 , wherein the ground patterns comprise polysilicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2016
From: LI, TZUNG-LIN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 039694/0842 →
Continuity (1)
Related Publication 20180076500A1 · Mar 15, 2018
Cited By (16)
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